Processor architecture providing for speculative execution of in

Electrical computers and digital processing systems: processing – Processing architecture – Superscalar

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

712239, 712244, 712218, G06F 1500

Patent

active

059875887

ABSTRACT:
A processor architecture is described which operates with improved computational efficiency using instruction fetching functions that are decoupled from instruction execution functions by a dynamic register file. The instruction fetching function operates in free-running mode which does not stop if a fetched instruction cannot be executed due to data being unavailable or due to other instruction dependencies. Branch instructions are taken in a predicted direction and the results of execution of all instructions are provisionally stored pending validation or invalidation on the basis of the dependencies becoming available later. For branches of executed instructions that are later invalidated, the results of the executed instructions are flushed from provisional storage and the initial instruction which previously executed at the beginning of a branch on predicted dependencies is re-executed on the actual data that subsequently became available, and all subsequent instructions in such branch are also re-executed on the basis of dependencies actually available from execution of previous instructions in such branch.

REFERENCES:
patent: 4325121 (1982-04-01), Gunter et al.
patent: 4338661 (1982-07-01), Tredennick et al.
patent: 4342078 (1982-07-01), Tredennick et al.
patent: 4402042 (1983-08-01), Guttag
patent: 4626989 (1986-12-01), Torii
patent: 4675806 (1987-06-01), Uchida
patent: 4722049 (1988-01-01), Lahti
patent: 4803615 (1989-02-01), Johnson
patent: 4807113 (1989-02-01), Matsumoto et al.
patent: 4807115 (1989-02-01), Torng
patent: 4811215 (1989-03-01), Smith
patent: 4926323 (1990-05-01), Baror et al.
patent: 5072364 (1991-12-01), Jardine et al.
patent: 5075844 (1991-12-01), Jardine et al.
patent: 5146570 (1992-09-01), Hester et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5487156 (1996-01-01), Popescu et al.
patent: 5592636 (1997-01-01), Popescu et al.
patent: 5628024 (1997-05-01), Horst
patent: 5682492 (1997-10-01), McFarland et al.
Acosta et al., "An Instruction Issuing Approach to Enhancing Performance in Multiple Functional Unit Processors."p0 IEEE Transactions on Computers, 36(9):815-828 (1986).
Patt et al., "HPS, A New Microarchitecture: Rational and Introduction"; ACM 1985.
Patt et al., "Critical Issues Regarding HPS. A High Performance Microarchitecture" ACM 1985.
Pleszkun et al., "The Performance Potential of Multiple Functional Unit Processor" IEEE 1988.
Pleszkien et al., "The Performance Potential of Multiple Functional Unit Processors" IEEE 1987.
Pleszkien et al., "WISQ: A Restartable Architecture using Queries" 1987; ACM.
Ramseyer et al., "A Multi-Microprocessor Implementation of a General Purpose Pipelined CPU." 4.sup.th Annual Symposium on Computer Architecture. pp. 29-34, Mar. 23, 1977.
Smith et al., "Implementing Precise Interrupts in Pipelined Computers." IEEE Transactions on Computers,37(5):562-573 (1988).
Sohi, "Insrtuction Issue for High-Performance, Interruptible, Multiple Functional Unit, Pipelined Computers," IEEE Transactions on Computers, 39(3):349-359 (1990).
Weiss et al., "Instruction Issue Logic for Pipelined Super-computers." 11.sup.th Annual International Symposium on Computer Architecture, pp. 110-118, Jun. 5, 1984.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Processor architecture providing for speculative execution of in does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Processor architecture providing for speculative execution of in, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processor architecture providing for speculative execution of in will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1338533

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.