Electrical computers and digital processing systems: processing – Instruction issuing
Reexamination Certificate
2011-05-17
2011-05-17
Fennema, Robert (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction issuing
Reexamination Certificate
active
07945764
ABSTRACT:
A multirate execution unit is capable of being operated in a plurality of modes, with the execution unit being capable of clocked at multiple different rates relative to a multithreaded issue unit such that, in applications where maximum performance is desired, the execution unit can be clocked at a rate that is faster than the clock rate for the multithreaded issue unit, and in applications where a lower power profile is desired, the execution unit can be throttled back to a slower rate to reduce the power consumption of the execution unit. When the execution unit is clocked at a faster rate than the multithreaded issue unit, the issue unit is permitted to issue more instructions per cycle than when the execution unit is throttled to the slower rate to increase overall instruction throughput.
REFERENCES:
patent: 6038675 (2000-03-01), Gabzdyl et al.
patent: 7149880 (2006-12-01), Kottapalli
patent: 2004/0243875 (2004-12-01), Dalvi
patent: 2008/0109611 (2008-05-01), Liu et al.
Mejdrich Eric Oliver
Muff Adam James
Tubbs Matthew Ray
Fennema Robert
International Business Machines - Corporation
Wood Herron & Evans LLP
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