Processing unit for generating signals for communication with a

Details Processing unit for generating signals for communication with a Processing unit for generating signals for communication with a

1996-04-10

1997-12-02

Beausoliel, Jr., Robert W.

Excavating

371 251, 3952001, G01R 3128

Patent

active

056943997

ABSTRACT:
A system for interfacing with a test access communication port. Specifically, the present invention has application to the IEEE 1149.1 Test Access Port ("JTAG") standard. The novel system includes a hardware unit having a memory unit and a special processor unit (SPU) that interfaces between the test access port and components of a general purpose host computer system. The host computer system uses software procedures to formulate a set of compressed instructions instructing the hardware unit to generate and/or receive signals in connection with the test access port. In one embodiment, the host computer system contains configuration data in a special format. The host computer system translates this configuration data into the compressed instructions which are transmitted to the hardware unit causing it to download the configuration data using signals recognized by the test access port. The data is downloaded into a programmable integrated circuit device using the test access port. The SPU contains circuitry to expand the compressed instruction to generate the appropriate driving and receiving signals of the test access port. In one embodiment, clock, state machine, and data-in signals are generated by the SPU while a data-out signal can be received and relayed to the host computer system. The host computer system can be of a number of well known platforms (e.g., x86, DEC Alpha, Power PC, Mips, RISC, etc.).

REFERENCES:
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patent: 5483518 (1996-01-01), Whetsal
IEEE Computer Society, "IEEE Standard Test Access Port and Boundary-Scan Architecture" IEEE Std 1149.1-1990, Copyright 1993 by the Institute of Electrical and Electronics Engineers, Inc. 345 East 47th Street, New York, NY 10017.

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