Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2004-10-18
2008-11-25
Dollinger, Tonia L. M. (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S031000, C711S152000
Reexamination Certificate
active
07457939
ABSTRACT:
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A processing system is provided for processing programs and data. The processing system has a processing unit and multiple sub-processing units. Each sub-processing unit includes a dedicated local memory for storing programs and data. The dedicated local memory of each respective sub-processing unit is not a cache memory. In an alternative, multiple computing devices may connect to one another via a communications network, and each computing device may include at least one processing element having the processing unit and sub-processing units.
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Suzuoki Masakazu
Yamazaki Takeshi
Dollinger Tonia L. M.
Lerner David Littenberg Krumholz & Mentlik LLP
Sony Computer Entertainment Inc.
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