Processing system having co-processor for storing data

Details Processing system having co-processor for storing data Processing system having co-processor for storing data

2011-01-25

2011-01-25

Chan, Eddie P (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

Reexamination Certificate

active

07877576

ABSTRACT:
When an interruption instruction occurs in an information processing apparatus including a CPU and a coprocessor, execution of a single dedicated instruction “GETACX Dm,Dn” performs saving of necessary data from all registers. “Dm” is a value output from a general register group104to a first data input bus120. Each of calculation units implemented in a coprocessor110recognizes a value stored therein. If a value “Dm” specifies one of the calculation units, the specified calculation unit outputs, to a selector116, data stored in a register included in the specified calculation unit. An implemented calculation unit information output circuit117stores therein the count of the calculation units implemented in the coprocessor110. If a value of the first data input bus120is greater than the count of the calculation units, the implemented calculation unit information output circuit117outputs a value “1” to a flag register102. Based on the fact that the value stored on the flag register102is “1”, a CPU100recognizes that saving of the data from the register has been completed.

REFERENCES:
patent: 5881257 (1999-03-01), Glass et al.
patent: 5909565 (1999-06-01), Morikawa et al.
patent: 5983338 (1999-11-01), Moyer et al.
patent: 6434689 (2002-08-01), Fleck et al.
patent: 2006/0010305 (2006-01-01), Maeda et al.

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