Boots – shoes – and leggings
Patent
1994-03-31
1996-08-13
Coleman, Eric
Boots, shoes, and leggings
3642632, 364263, 3642624, 3642318, 364DIG1, 395375, G06F 938
Patent
active
055465994
ABSTRACT:
A processing system and method of operation are provided. A determination is made about whether to dispatch an instruction to execution circuitry for execution. After determining to dispatch the instruction, a determination is made about whether an exception condition exists for the instruction. The instruction is dispatched to the execution circuitry. In response to determining an exception condition exists for the instruction, an indication is output to inhibit execution of the instruction by the execution circuitry.
REFERENCES:
patent: 5051940 (1991-09-01), Vassiliadis et al.
patent: 5077692 (1991-12-01), McMinn
patent: 5129067 (1992-07-01), Johnson
patent: 5136697 (1992-08-01), Johnson
patent: 5177701 (1993-01-01), Iwasa
patent: 5197135 (1993-03-01), Eickemeyer et al.
patent: 5202889 (1993-04-01), Aharon et al.
patent: 5214763 (1993-05-01), Blaner et al.
patent: 5222244 (1993-06-01), Carbine et al.
patent: 5257214 (1993-10-01), Mason et al.
patent: 5257216 (1993-10-01), Sweedler
patent: 5261066 (1993-11-01), Jouppi et al.
patent: 5268855 (1993-12-01), Mason et al.
patent: 5274818 (1993-12-01), Vasilevsky et al.
patent: 5333296 (1994-07-01), Bouchard
patent: 5341482 (1994-08-01), Cutler
patent: 5390305 (1995-02-01), Takahashi
IEEE Transactions on Computers, vol. 39, No. 3, Mar. 1990, "Instruction Issue Logic for High-Performance, Interruptible, Multiple Functional Unit, Pipelined Computers" to G. S. Sohi, pp. 349-359.
Interrupt Handling for out-of-order Execution Processors, IEEE Trans. on Computers, vol. 42, No. 1, Jan. 1993, pp. 122-127.
Implementing Precise Interruptions in Pipelined RISC Processors, IEEE Micro, Aug. 1993, pp. 36-43.
Implementing Precise Interrupts in Pipelined Processors by J. Smith et.al, IEEE Trans. on Computers, May 1988, vol. 37, No. 5 pp. 562-572.
Speculative Execution Exception Recovery using Write-back Suppression by R. A. Bringmann et.al, IEEE, 1993 pp. 214-223.
Coleman Eric
Davis, Jr. Michael A.
International Business Machines - Corporation
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