Processing modules for computer architecture for broadband...

Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C709S208000, C710S110000, C711S163000

Reexamination Certificate

active

07093104

ABSTRACT:
A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network. A system and method for creating a dedicated pipeline for processing streaming data also are provided.

REFERENCES:
patent: 3576544 (1971-04-01), Cordero et al.
patent: 4037214 (1977-07-01), Birney et al.
patent: 4332009 (1982-05-01), Gerson
patent: 4422088 (1983-12-01), Gfeller
patent: 4430705 (1984-02-01), Cannavino et al.
patent: 4545016 (1985-10-01), Berger
patent: 4589064 (1986-05-01), Chiba et al.
patent: 4732446 (1988-03-01), Gipson et al.
patent: 4782443 (1988-11-01), Matsumoto
patent: 4903234 (1990-02-01), Sakuraba et al.
patent: 4939682 (1990-07-01), Falk
patent: 4954982 (1990-09-01), Tateishi et al.
patent: 5037173 (1991-08-01), Sampsell et al.
patent: 5056000 (1991-10-01), Chang
patent: 5093879 (1992-03-01), Bregman et al.
patent: 5131054 (1992-07-01), Smith
patent: 5144691 (1992-09-01), August et al.
patent: 5159700 (1992-10-01), Reid et al.
patent: 5216633 (1993-06-01), Weon et al.
patent: 5268973 (1993-12-01), Jenevein
patent: 5355481 (1994-10-01), Sluijter
patent: 5487146 (1996-01-01), Guttag et al.
patent: 5497465 (1996-03-01), Chin et al.
patent: 5513337 (1996-04-01), Gillespie et al.
patent: 5581777 (1996-12-01), Kim et al.
patent: 5619671 (1997-04-01), Bryant et al.
patent: 5724551 (1998-03-01), Greenstein et al.
patent: 5729712 (1998-03-01), Whittaker
patent: 5787309 (1998-07-01), Greenstein et al.
patent: 5848435 (1998-12-01), Brant et al.
patent: 5850534 (1998-12-01), Kranich
patent: 5892966 (1999-04-01), Petrick et al.
patent: 5900019 (1999-05-01), Greenstein et al.
patent: 5940870 (1999-08-01), Chi et al.
patent: 5991858 (1999-11-01), Weinlander
patent: 6035381 (2000-03-01), Mita et al.
patent: 6076149 (2000-06-01), Usami et al.
patent: 6173389 (2001-01-01), Pechanek et al.
patent: 6209065 (2001-03-01), Van Doren et al.
patent: 6212605 (2001-04-01), Arimilli et al.
patent: 6219073 (2001-04-01), Suzuoki
patent: 6289434 (2001-09-01), Roy
patent: 6334139 (2001-12-01), Sakakura
patent: 6336187 (2002-01-01), Kern et al.
patent: 6427181 (2002-07-01), Furuhashi
patent: 6427201 (2002-07-01), Ohba
patent: 6467012 (2002-10-01), Alvarez et al.
patent: 6477170 (2002-11-01), Lu et al.
patent: 6647208 (2003-11-01), Kirby
patent: 6647486 (2003-11-01), Ohba
patent: 2002/0078285 (2002-06-01), Hofstee et al.
patent: 2002/0078308 (2002-06-01), Altman et al.
patent: 2002/0087815 (2002-07-01), Arimilli et al.
patent: 0077404 (1983-04-01), None
patent: 0 461 926 (1991-12-01), None
patent: 0 730 237 (1996-09-01), None
patent: 0871142 (1998-10-01), None
patent: 2326254 (1998-12-01), None
patent: 54-012643 (1979-01-01), None
patent: 54-146555 (1979-11-01), None
patent: 56-111962 (1981-09-01), None
patent: 56-123051 (1981-09-01), None
patent: 57-006952 (1982-01-01), None
patent: 57-176456 (1982-10-01), None
patent: 61-180352 (1986-08-01), None
patent: 63-019058 (1988-01-01), None
patent: 64-012364 (1989-01-01), None
patent: 64-023342 (1989-01-01), None
patent: 01-217689 (1989-08-01), None
patent: 02-012361 (1990-01-01), None
patent: 02-057237 (1990-02-01), None
patent: 02-210542 (1990-08-01), None
patent: 04-288643 (1992-10-01), None
patent: 05-054009 (1993-03-01), None
patent: 05-151183 (1993-06-01), None
patent: 5-242057 (1993-09-01), None
patent: 05-242057 (1993-09-01), None
patent: 06-012333 (1994-01-01), None
patent: 07-287064 (1995-10-01), None
patent: 08-161283 (1996-06-01), None
patent: 08-180018 (1996-07-01), None
patent: 08-212178 (1996-08-01), None
patent: 08-235143 (1996-09-01), None
patent: 08-249261 (1996-09-01), None
patent: 09-198361 (1997-07-01), None
patent: 09-311839 (1997-12-01), None
patent: 10-126771 (1998-05-01), None
patent: 10-269165 (1998-10-01), None
patent: 10-334055 (1998-12-01), None
patent: 11-003306 (1999-01-01), None
patent: 11-039215 (1999-02-01), None
patent: 11-232247 (1999-08-01), None
patent: 11-338833 (1999-12-01), None
patent: 20000010913 (2000-01-01), None
patent: 2000-057329 (2000-02-01), None
patent: 2000-222384 (2000-08-01), None
patent: 2002-032218 (2002-01-01), None
“IBM Wins Playstation 3 Contract,” BBC News, Mar. 12, 2001.
Masakazu Suzuoki, Playstation 2 Yur Maikuropurosessesa Emotion Engine (Microprocessor Emotion Engine for PlayStation 2), bit, Kyoritsu Shuppan Col, Ltd., Jan. 1, 2000, pp. 11-18, vol. 32, No. 1.
Baer, et al. “On the Inclusion Properties for Multi-Level Cache Hierarchies,” Proceedings of the Annual International Symposium on Computer Architecture, Honolulu, Hawaii, May 30-Jun. 2, 1988, Washington, IEEE Computer Society Press, pp. 73-80.
Mamoru Maekawa, et al., “Distributed Operating System—That Coming Next to UNIX,” 1st Ed., Dec. 25, 1991, Kyoritsu Shuppan Co., Ltd.
“IBM System/370 Extended Architecture Instruction Manual,” 1st Ed., IBM Japan, Apr. 1984, pp. 3-8.
William J. Dally, et al., “The Message-Driven Processor: A Multicomputer Processing Node with Efficient Mechanisms,” IEEE Micro, Apr. 1992, pp. 23-39.
Ted Painter, et al., “Perceptual Coding of Digital Audio,” Proceedings of the IEEE, vol. 88, No. 4, Apr. 2000, pp. 451-513.
Masakazu Suzuoki, Development of a Microprocessor with a 128b CPU, 2 Vector Processors with 10 Floating Point Units, IPSJ Journal, Information Processing Society of Japan, Apr. 15, 2000, pp. 843-850, ISSN 0387-5806, vol. 41, No. 4.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Processing modules for computer architecture for broadband... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Processing modules for computer architecture for broadband..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Processing modules for computer architecture for broadband... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3647935

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.