Processing method of wafer

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S113000, C257SE21237, C257SE21238, C257SE21329, C257SE21499

Reexamination Certificate

active

07622328

ABSTRACT:
A separation groove having a depth corresponding to a finished thickness of a semiconductor chip is formed in a boundary between a device region and an outer peripheral surplus region of a wafer, a protection tape whose adhesion is deteriorated by irradiation of ultraviolet rays is adhered on a surface, a portion of a back surface corresponding to the device region is ground, a thick reinforcing portion is formed on a portion corresponding to the outer peripheral surplus region. Next, only a portion of the protection tape adhered on the reinforcing portion is irradiated with ultraviolet rays, the reinforcing portion8is separated from the protection tape and is separated from the device region. A dicing frame is mounted on the back surface of the wafer having only the device region through a dicing tape, and the wafer is divided into semiconductor chips.

REFERENCES:
patent: 6581586 (2003-06-01), Sekiya
patent: 7384859 (2008-06-01), Watanabe
patent: 2007/0134889 (2007-06-01), Watanabe
patent: 2007/0134890 (2007-06-01), Watanabe
patent: 2007/0231929 (2007-10-01), Kajiyama et al.
patent: 2007/0284764 (2007-12-01), Sekiya
patent: H05-121384 (1993-05-01), None

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