Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
1998-09-28
2002-02-19
Black, Thomas (Department: 2171)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S022000, C712S041000, C717S152000
Reexamination Certificate
active
06349377
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a processing device for executing virtual machine instructions; the processing device comprising: an instruction memory for storing instructions including at least one of the virtual machine instructions; a microcontroller comprising a processor comprising a predetermined microcontroller core for executing native instructions from a predetermined set of microcontroller specific instructions; the native instructions being different from the virtual machine instructions; and a pre-processor comprising: a converter for converting at least one virtual machine instruction, fetched from the instruction memory into at least one native instruction; and feeding means for feeding native instructions to the microcontroller core for execution.
The invention further relates to a pre-processor for use with a microcontroller comprising a processor comprising a predetermined microcontroller core for executing native instructions from a predetermined set of microcontroller specific instructions;
the pre-processor comprising: a converter for converting at least one virtual machine instruction, fetched from an instruction memory, into at least one native instruction; the native instructions being different from the virtual machine instructions; and feeding means for feeding native instructions to the microcontroller core for execution.
Increasingly, source programs are expressed in (compiled to) instructions of a virtual machine instead of native instructions of a microcontroller on which the program is to be executed. A main reason for using a virtual machine is portability of programs between different machines (platforms). A program expressed in the virtual machine instructions of the virtual machine can be executed relatively easily on several concrete machines, using suitable interpreters operating on those machines. At this moment a driving force for using portable programs is Java, where Java programs (referred to as applets) are exchanged via Internet and can be executed on different native machines using processors with different instruction sets. Using a compiler, Java applets are expressed in Java byte codes (JBCs), which form the instructions of the Java Virtual Machine. For embedded applications, a further driving force for using virtual machines is the need for compact code. As the size of software continuously grows, software compression techniques which, due to a certain initial costs, where not attractive before become feasible. One of such techniques is to choose a suitable virtual machine for a specific embedded application, such that the program can be expressed more compactly in the virtual machine instructions than in the native instructions. An example of such a virtual machine is a stack machine, which is known for its compact representation. A specific virtual machine for an embedded application can be defined by first expressing the source program in virtual machine instructions of a chosen virtual machine, such as a stack machine, and additionally, replacing sequences of virtual machine instructions which occur frequently in the compiled code by newly defined additional virtual machine instructions, where, for instance, one new instruction replaces a sequence of four existing instructions.
Conventionally, programs expressed in virtual machine instructions are executed by means of software interpretation. The processor (CPU) executes a special interpreter program, where in a loop the processor fetches a virtual machine instruction, decodes it into a sequence of native instructions of the microcontroller core of the processor and executes each native instruction. This technique is slow and requires an additional interpreter program, which can be relatively large. To improve the execution speed, the so-called Just-In-Time (JIT) compilation technique is used. Just before starting execution of software module expressed in virtual machine instructions, the module is compiled to native code (expressed in native machine instructions). In this way, the module needs to be stored twice in addition to the code for the compiler. The additional storage requirements of software interpretation are not desired for embedded systems. Instead it is preferred to use a hardware interpreter. In itself a hardware interpreter is known in the form of a Prolog pre-processor for Warren's abstract instruction set. In the paper “A Prolog pre-processor for Warren's abstract instruction set” by B. Knödler and W. Rosenstiel, Microprocessing and Microprogramming 18 (1986) pages 71-81, a pre-processor is described for interpreting programs written in the Prolog programming language on a Motorola 68000 processor (MC68000). A compiler is used to translate the Prolog source program into instructions, which have been defined by Mr. Warren and which are generally used for executing Prolog programs. The set of Warren instructions forms a virtual machine designed for executing Prolog programs. The sequence of Warren instructions resulting from the compilation are executed by the MC68000 with the aid of the pre-processor. After power-on, the MC68000 first performs a booting procedure by executing native MC68000 instructions. At the end of the booting procedure, the MC68000 is ready to initiate the execution of a Prolog program. This is started by jumping to a predetermined address range. The pre-processor is a memory-mapped device, which is mapped to this range. When the pre-processor is addressed it reads a Warren instruction (of the translated Prolog program) from its own RAM, adaptively synthesizes a sequence of MC68000 instructions and constants and sends these directly to the CPU for execution. The MC68000 instructions for each Warren instruction are stored in ROM of the pre-processor. In general, the pre-processor translates one Warren instruction into a sequence of MC68000 instructions. The pre-processor contains its own RAM controller and ROM controller, which generate the addresses for the RAM and ROM of the pre-processor. The RAM controller manages the RAM instruction pointer. Each successive read operation of the MC68000 results in the pre-processor sending the next instruction (and optional constants) of the sequence to the CPU. If the sequence has been completed, a next read operation results in the first instruction of the sequence corresponding to the next Warren instruction of the program being send to the CPU. After an interrupt, a repeated read operation of the CPU results in re-sending the last instruction (and optional constants).
SUMMARY OF THE INVENTION
It is an object of the invention to provide a processor device of the kind set forth which is suitable for use with a microcontroller which contains more than one instruction at a time.
To achieve the object, the processor is of a type which after the occurrence of a predetermined condition, such as an interrupt, requests re-feeding of up to a predetermined maximum of n native instructions, where n>1; and the feeding means comprises means for in response to the processor requesting re-feeding of a number of native instructions, re-feeding the requested native instructions. The inventor has realised that modern processors can comprise several native instructions at a time, where the execution of the instruction has not yet begun or has not yet been completed, and that in order to increase performance it is desired to exploit the capabilities of the processor of containing more than one instruction. The inventor had the insight that in order to cope with the situation in which the processor discards at least some of the already loaded instructions and at a later stage requests re-feeding of several instructions (e.g. on the occurrence of certain conditions, such as an interrupt), a re-feeding mechanism is required for re-feeding the requested native instructions to the processor.
According to one embodiment, the pre-processor comprises a feeding memory, such as a FIFO, for storing last fed instructions and re-feeding from the feeding memory, providing a simple and effective way of
Black Thomas
Chen Te Yu
U.S. Philips Corporation
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