Processing apparatus having reduced bus lengths between operatin

Details Processing apparatus having reduced bus lengths between operatin Processing apparatus having reduced bus lengths between operatin

1996-11-27

1999-12-28

Follansbee, John A.

Data processing: generic control systems or specific application

Specific application, apparatus or process

Article handling

700 5, 711149, G06F 1500

Patent

active

060092548

ABSTRACT:
A processing apparatus comprises a register file having a rectangle-shaped contour and including a plurality of registers each of which is comprised of a plurality of register cells, a first operating unit located opposite to a first side of the rectangular contour of the register file, a second operating unit located opposite to a second side of the rectangular contour of the register file which is opposite to the first side, a third operating unit located opposite to a third side of the rectangular contour of the register file which is different from the first and second sides, a first data bus disposed for transferring data between the first operating unit and the register file, a second data bus disposed for transferring data between the second operating unit and the register file, and a third data bus disposed for transferring data between the third operating unit and the register file.

REFERENCES:
patent: 3969724 (1976-07-01), Anderson et al.
patent: 4164031 (1979-08-01), Lou et al.
patent: 5301340 (1994-04-01), Cook
Floorplan of the Alpha 21164 Chip wherein a register file and processing units are arranged in a horizontal or vertical row, Digital Technical Journal, vo. 7, No. 12, p. 102 (1995).

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