Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
Reexamination Certificate
2011-01-25
2011-01-25
Chan, Eddie P (Department: 2183)
Electrical computers and digital processing systems: processing
Instruction decoding
Predecoding of instruction component
C712S239000
Reexamination Certificate
active
07877578
ABSTRACT:
The present invention provides an information processing apparatus having a predecoder decoding an operation code in an input instruction, generating conditional branch instruction information indicating that the input instruction is a conditional branch instruction and instruction type information indicating a type of the conditional branch instruction when the input instruction is a conditional branch instruction, and writing the input instruction, from which the operation code is deleted, the conditional branch instruction information and the instruction type information to the instruction cache memory, and a history information writing unit writing history information indicating whether or not the conditional branch instruction was branched, as a result of executing the conditional branch instruction stored in the instruction cache memory, to an area in the instruction cache memory, where the operation code of the conditional branch instruction is deleted.
REFERENCES:
patent: 5828895 (1998-10-01), Chan et al.
patent: 5928358 (1999-07-01), Takayama et al.
patent: 6457117 (2002-09-01), Witt
patent: 63-75934 (1988-04-01), None
patent: 10-228377 (1998-08-01), None
Chan Eddie P
Faherty Corey
Fujitsu Semiconductor Limited
Staas & Halsey , LLP
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