Processing a printed wiring board by single bath...

Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Forming multiple superposed electrolytic coatings

Reexamination Certificate

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C205S182000

Reexamination Certificate

active

06547946

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of Endeavor
The present invention relates to printed wiring boards and more particularly to a single bath electrodeposition system.
2. State of Technology
U.S. Pat. No. 3,770,571 for fabrication of printed circuit boards by Henry Alsberg and Ronald A. Frederiksen, patented Nov. 6, 1973, provides the following statements, “printed circuit boards have become an important commercial form of circuits for the electronic industry. In general, they comprise a metal coating in a particular design representing a circuit or circuits attached either directly or indirectly (i.e., by adhesives) to the surface or surfaces of an electrically nonconductive substrate. Often the substrate is rigid as in reinforced epoxies, although it can also be flexible as in polyester films.”
U.S. Pat. No. 4,487,654 for a method of manufacturing printed wiring boards by James A. Coppin, patented Dec. 11, 1984, provides the following description, “
FIG. 2
is a table showing a sequence of process steps which may be followed in manufacturing a printed circuit board . . . . In the following description, necessary art work for and conventional steps of
FIG. 2
that are normally used in the manufacture of a printed circuit board are not described in detail since they are well known in the prior art . . . . Holes are drilled through substrate in a prescribed hole pattern (step
101
) [not shown] and a thin layer of copper is chemically deposited on one or both sides of the substrate and walls of the holes to make them electrically conductive (step
102
) [not shown]. Alternatively, the substrate may have 1 ounce copper cladding bonded to one or both sides thereof prior to drilling component holes and chemically depositing a thin layer of copper on the board and the walls of the holes (step
102
) for making them conductive. One ounce copper refers to a copper foil that weighs one avoir ounce per square foot and has a nominal thickness of 0.0014″. A relatively thick layer of plating resist is then applied over the full surface areas of the copper in a negative image of the desired electrical circuit pattern . . . . After appropriate curing of the plating resist, an additional layer of copper is electroplated onto the exposed areas of copper to build them up to the full-required thickness, as dictated by electrical circuit requirements . . . . In accordance with one aspect of this invention, a very thin coating of tin-lead solder alloy is then deposited on the exposed copper surfaces of the board. The coating has a thickness which is sufficient to effectively operate as a metallic etch resist for the cropper that it covers, but which is thin enough that it will not melt and flow detrimentally during a subsequent wave soldering operation. By not flowing detrimentally, it is meant that any flow of tin-lead solder will be insufficient to cause bridging or wrinkling and/or rupture of a solder mask on top of it. It is believed there is no melting or flowing of the coating, but there appears to be a sintering of the solder into the copper traces during a subsequent reflow operation or wave solder operation. The composition of the tin-lead alloy is at least similar to and is preferably the same as that used in the subsequent wave soldering operation. By way of example, the solder of layer may be 63% tin and 37% lead. The thin coating is preferably electroplated onto the copper in order to more precisely control the thickness thereof . . . . A second layer of plating resist is then deposited over the first layer of plating resist and areas of the circuit pattern other than terminal pads and component holes, the latter requiring a relatively thick coating of solder to ensure good solderability of circuit components in a subsequent wave soldering operation. This second layer of plating resist is readily applied using the already existing art work for the solder mask. After cleaning and activating the exposed-thin area of tin-lead solder alloy in and around the holes, the thick layer of tin-lead is built up by electroplating to a desired thickness in the area of 0.300 to 0.500 milli-inches. The composition of the solder plating used in this electroplating operation may also be the same as that used in the subsequent wave solder operation. Both of the layers of plating resist are now chemically stripped from the board. In order to remove excess copper which is not part of a desired electrical circuit pattern, the board is then immersed in or sprayed with an etchant solution for removing copper that is not covered and protected by the tin-lead overplatings which operate as an etch to the copper under them. The etchant is selected to be one that has little affect on the tin-lead alloy but which readily dissolves copper. In accordance with another aspect of this invention, the circuit board is next cleaned, rinsed, acid dipped, rinsed and then mechanically-abrasively scrubbed for cleaning and roughening the surface of and reducing the thickness of the thin layer of tin-lead (step
110
) [not shown]. The mechanical scrubber may be a conventional commercially available machine such as the model
107
, which is manufactured by CHEMCUT and may have an integral drying facility. Abrasive rollers of the scrubber should be cleaned periodically so that they do not contaminate the surface of the board. It is not necessary for the thin layer of tin-lead to be completely removed from the copper. Preferably the abrasive scrubbing cleans and roughens the surface of the solder coating, and only removes surface amounts of that solder. Rather, it is preferable that the copper traces under the coating not be exposed since this introduces a cosmetic defect. Additionally, such an amount of scrubbing may damage the copper traces since it has been found that the solder coating actually sinters or soaks into or amalgamates with the copper under it during a subsequent reflow operation. In practice, it has been found that a thin layer of tin-lead may actually be left on the board, omitting the scrubbing operation, without serious adverse affects. In accordance with a further aspect of this invention, a solder mask of a solder-resist is then applied to the surface of the board. The solder mask is preferably applied subsequent to heating of the board for eliminating any moisture left on it during cleaning and prior to reflow or fusing of the thick-tin-lead layer. The mask itself is conventional and is applied in the desired thickness and cured in the manner well known in the prior art. The solder mask provides an overall printed wiring board that is esthetically pleasing and is a conformal-protective coating. The solder mask is preferably applied prior to reflow so that if fusing is accomplished by dipping the board in a hot oil bath, then oil and other contaminants will not be located on the areas of the board that are subsequently to be coated with solder-resist. In this sequence of operations, the solder mask also prevents bridging during wave soldering, reduces the solder content and spiking in large ground plane areas, and prevents cross over between closely spaced circuit traces. Also, this sequence of processing causes the solder mask to bond more firmly to the circuit board. Finally, the tin-lead overplating in the areas of the holes and contacts is fused by exposing the board to a sufficiently high temperature in the conventional manner (step
112
) [not shown]. This fusing provides a shiny surface to the layer and eliminates deformities such as striations in the solder layer which may be subsequently contaminated by oil from the fingers of a human operator. Following the reflow operation, conventional fabrication operations are completed and then the completed printed wiring board is stored until it is loaded with components which may be attached thereto by a wave solder operation. The disclosure of U.S. Pat. No. 4,487,654 to James A. Coppin, patented Dec. 11, 1984, is incorporated herein by reference.
U.S. Pat. No. 5,052,103 for a method of manufacturing printed

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