Processes for chemical-mechanical polishing of a...

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

Reexamination Certificate

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C438S693000, C438S694000, C438S749000, C438S751000, C438S754000, C134S001300, C216S088000, C216S089000, C216S090000

Reexamination Certificate

active

06579798

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to the field of chemical-mechanical polishing (“CMP”) of a semiconductor wafer. Specifically, the present invention relates to processes for reducing defects on a semiconductor wafer.
2. Description of Related Art
Some known chemical-mechanical processes for polishing a semiconductor wafer may include forming a dielectric layer over the semi-conductor body, etching a plurality of trenches into the dielectric layer, and forming a barrier layer over the dielectric layer and the trenches. These known processes also include forming a copper seed level over the barrier layer and forming a copper level over the copper seed level, such that a portion of the copper seed layer and a portion of the copper level also are disposed in the trenches. In these known processes, the copper layer, the copper seed layer, and the barrier layer may be removed by a polishing pad, which may include a slurry composition disposed on the side of the polishing pad which contacts the various layers in order to oxidize the layers. Moreover, a first polishing pad may be used to remove the copper layer(s) and another polishing pad may be used to remove the barrier layer. After the removal of the copper layer(s) and the barrier layer, the wafer then may be transferred to a buffing pad, which may buff the wafer in order to buff out topographical defects. The pads may be periodically washed with de-ionized water. However, the polishing pads and the buffing pad may have defects on the side that polishes or buffs the wafer, which may be transferred to the wafer during the polishing and buffing steps. Moreover, in a polishing system, a number of wafers may be simultaneously polished, such that while the copper layer of one wafer is being removed, the barrier layer of the wafer which most recently underwent copper layer polishing may be simultaneously removed at another station. However, the barrier polishing step and the buffing step may take less time than the copper polishing step. As such, the polished wafer and the buffed wafer must wait until the completion of the copper polishing step before they may moved to the next station to perform the next step in the polishing processes. During this wait, the wafers on which operation has been completed are unable to move on to the next step and may begin to dry, which may allow the defects to permanently set into the wafer. Moreover, the de-ionized water which may be periodically applied to the pads may not prevent the defects from permanently setting in.
SUMMARY OF THE INVENTION
Therefore, a need has arisen for processes that overcome these and other shortcomings of the related art. A technical advantage of the present invention is that after the barrier level has been removed by the barrier level polishing pad, the polishing pad and wafer may be rinsed with a moisture maintaining compound, such as a copper chelating compound. The moisture maintaining compound may reduce or even prevent a drying of the wafer while the wafer is waiting to move on to the next step in the polishing process, which may improve wafer topography. Similarly, another technical advantage of the present invention is that after the wafer has been buffed, the buffing pad and the buffed wafer may be rinsed with the moisture maintaining compound, such as a copper chelating compound. The moisture maintaining compound may reduce or even prevent a drying of the wafer while the wafer is waiting to be unloaded from a wafer carrier, which may improve wafer topography.
In an embodiment of the present invention, a process for polishing a semiconductor wafer according to an embodiment of the present invention is described. The process comprises the steps of providing a plurality of wafers, forming a first layer, such as a barrier layer, over at least a portion of each wafer, and forming at least one layer comprising copper over at least a portion of each first layer. The process further includes the steps of providing a first polishing pad, providing a buffing pad, providing a plurality of operatively connected wafer carriers, and disposing a wafer within each of the wafer carriers. The process also includes the steps of disposing a first slurry composition on the first polishing pad, polishing a first of the wafers with said first polishing pad for a first length of time, in which the first polishing pad substantially removes the at least one layer comprising copper of the first wafer. The process further includes the steps of simultaneously buffing a second of the wafers with the buffing pad for a second length of time, in which the first length of time is greater than the second length of time, and rinsing the buffing pad and the second wafer with a moisture maintenance compound for at least a portion of the time between the completion of the second length of time and the first length of time. Moreover, the moisture maintenance compound substantially prevents a drying of the second wafer between the completion of the second length of time and the first length of time. In another embodiment, the moisture maintenance compound substantially cleans the second wafer between the completion of the second length of time and the first length of time.
In an embodiment of the present invention, a process for polishing a semiconductor wafer according to an embodiment of the present invention is described. The process comprises the steps of providing a plurality of wafers, forming a first layer, such as a barrier layer, over at least a portion of each wafer, and forming at least one layer comprising copper over at least a portion of each first layer. The process also comprises the steps of providing a first polishing pad, providing a second polishing pad, providing a buffing pad, providing a plurality of operatively connected wafer carriers, and disposing a wafer within each of the wafer carriers. The process further comprises the steps of disposing a first slurry composition on the first polishing pad, disposing a second slurry composition on the second polishing pad, and polishing a first of the wafers with the first polishing pad for a first length of time, in which the first polishing pad substantially removes the at least one layer comprising copper of the first wafer. The process also comprises the step of simultaneously polishing a second of the wafers with the second polishing pad for a second length of time, in which the second polishing pad substantially removes the first layer of the second wafer and the first length of time is greater than the second length of time.
The process further comprises the steps of simultaneously buffing a third of the wafers with the buffing pad for a third length of time, in which the first length of time is greater than the third length of time, and rinsing the second polishing pad and the second wafer with the moisture maintenance compound for at least a portion of the time between the completion of the second length of time and the first length of time. Moreover, the moisture maintenance compound substantially prevents drying of the second wafer between the completion of the second length of time and the first length of time. The process also comprises the step of rinsing the buffing pad and the third wafer with the moisture maintenance compound for at least a portion of the time between the completion of the third length of time and the first length of time. Moreover, the moisture maintenance compound substantially prevents drying of the third wafer between the completion of the third length of time and the first length of time. In another embodiment, the moisture maintenance compound substantially cleans the second wafer between the completion of the second length of time and the first length of time.
In yet another embodiment of the present invention, a process for polishing a semiconductor wafer according to an embodiment of the present invention is described. The process comprises the steps of providing a plurality of wafers, forming a first layer, such as a barrier layer, o

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