Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2011-08-23
2011-08-23
Lee, Cheung (Department: 2812)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S253000, C438S381000, C438S700000, C257SE21011, C257SE21646, C257SE21651
Reexamination Certificate
active
08003480
ABSTRACT:
A process using oxide supporter for manufacturing a capacitor lower electrode of a micron stacked DRAM is disclosed. First, form a stacked structure. Second, form a photoresist layer on an upper oxide layer and then etch them. Third, deposit a polysilicon layer onto the upper oxide layer and the nitride layer. Fourth, deposit a nitrogen oxide layer on the polysilicon layer and the upper oxide layer. Sixth, partially etch the nitrogen oxide layer, the polysilicon layer and the upper oxide layer to form a plurality of vias. Seventh, oxidize the polysilicon layer to form a plurality of silicon dioxides surround the vias. Eighth, etch the nitride layer, the dielectric layer and the lower oxide layer beneath the vias. Ninth, form a metal plate and a capacitor lower electrode in each of the vias. Tenth, etch the nitrogen oxide layer, the polysilicon layer, the nitride layer and the dielectric layer.
REFERENCES:
patent: 7666797 (2010-02-01), Shea et al.
patent: 2007/0098892 (2007-05-01), Chung et al.
Hsiao Ching-Nan
Huang Chung-Lin
Huang Shin Bin
Inotera Memories, Inc.
Lee Cheung
Rosenberg , Klein & Lee
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