Process tolerant delay circuit having process sensitive and proc

Details Process tolerant delay circuit having process sensitive and proc Process tolerant delay circuit having process sensitive and proc

1996-12-30

1998-09-29

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By phase

327277, H03D 1300

Patent

active

058150099

ABSTRACT:
A process tolerant delay circuit includes a plurality of inverters that receive an input signal and provide an output signal related to the input signal but including a propagation delay of the plurality of inverters. At least one inverter comprises FETs of minimum channel lengths dependent upon a fabrication process by which the circuit was made. Accordingly, the plurality of inverters have a propagation delay dependent upon the fabrication process. A delay compensation device receives the output signal of the inverters and provides a compensated output signal related to the received signal but including a variable delay established in accordance with a control signal. A process sense stack provides the control signal only during a transition of the input signal, and with a value dependent upon a channel length of a FET device thereof. Thus, the plurality of inverters and delay compensation device operate together, per the control signal of the process sense stack, to provide a circuit capable of compensating for process degradations in order to provide a given delay in accordance with variations in the fabrication process by which they were made.

REFERENCES:
patent: 4494021 (1985-01-01), Bell et al.
patent: 4720670 (1988-01-01), Boyle
patent: 4922141 (1990-05-01), Lofgren et al.
patent: 5012141 (1991-04-01), Tomisawa
patent: 5021684 (1991-06-01), Ahuja et al.
patent: 5028824 (1991-07-01), Young
patent: 5051630 (1991-09-01), Kogan et al.
patent: 5055715 (1991-10-01), Inaba
patent: 5059838 (1991-10-01), Motegi et al.
patent: 5083043 (1992-01-01), Yoshida
patent: 5121014 (1992-06-01), Huang
patent: 5179303 (1993-01-01), Searles et al.
patent: 5214322 (1993-05-01), Neidorff et al.
patent: 5223755 (1993-06-01), Richley
patent: 5231319 (1993-07-01), Crafts et al.
patent: 5231320 (1993-07-01), Kase
patent: 5252867 (1993-10-01), Sorrells et al.
patent: 5300837 (1994-04-01), Fischer
patent: 5341031 (1994-08-01), Kinoshita et al.
patent: 5349311 (1994-09-01), Mentzer
patent: 5355037 (1994-10-01), Andresen et al.
patent: 5428309 (1995-06-01), Yamauchi et al.
patent: 5440260 (1995-08-01), Hayashi et al.
patent: 5451894 (1995-09-01), Guo
patent: 5453709 (1995-09-01), Tanimoto et al.
patent: 5459424 (1995-10-01), Hattori
patent: 5485111 (1996-01-01), Tanimoto
patent: 5497263 (1996-03-01), Masuda et al.
IBM Technical Disclosure Bulletin, "Process Tracking Delay Element", Author--M. Ueda; vol. 36, No. 09A, Sep. 1993.

Affiliated with

Also associated with

Rating

Process tolerant delay circuit having process sensitive and proc does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process tolerant delay circuit having process sensitive and proc, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process tolerant delay circuit having process sensitive and proc will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-688901