Process to suppress lithography at a wafer edge

Details Process to suppress lithography at a wafer edge Process to suppress lithography at a wafer edge

2005-08-09

2005-08-09

Chen, Kin-Chan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S714000

Reexamination Certificate

active

06927172

ABSTRACT:
Damage to the rim of a semiconductor wafer caused by etching processes is reduced by forming a rim of photoresist or other material around the outer edge of the wafer that has a thickness such that images projected on the rim are sufficiently out of focus that they do not develop, so that etching takes place only in the interior.

REFERENCES:
patent: 5472812 (1995-12-01), Sekine
patent: 6033997 (2000-03-01), Perng
patent: 6132908 (2000-10-01), Shiraishi et al.
patent: 6291315 (2001-09-01), Nakayama et al.
patent: 6489249 (2002-12-01), Mathad et al.
patent: 6713236 (2004-03-01), Chen
patent: 6806200 (2004-10-01), Dobuzinsky et al.

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