Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Patent
1999-01-04
2000-03-14
Fahmy, Wael
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
438436, 438437, H01L 2176
Patent
active
060372389
ABSTRACT:
A process for creating an insulator filled, shallow trench isolation region, in a semiconductor substrate, has been developed. The process features the use of a high temperature hydrogen anneal, performed after an anisotropic RIE procedure, used to create the shallow trench shape, in the semiconductor substrate. The high temperature hydrogen anneal procedure repairs defects in the semiconductor substrate, created by the shallow trench, RIE procedure, and also creates a denuded zone, at or near the shallow trench shape, exposed silicon surface. The defect free denuded zone allows the formation of a uniform insulator trench liner to be realized, and also allows a minimum of junction leakage to occur at the region in which a source/drain-substrate junction, is butted against the side of the insulator filled, shallow trench.
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Chang Jung-Ho
Chen Hsi-Chuan
Lin Dahcheng
Ackerman Stephen B.
Fahmy Wael
Pham Long
Saile George O.
Vanguard International Semiconductor Corporation
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