Process to form rugged polycrystalline silicon surfaces

Details Process to form rugged polycrystalline silicon surfaces Process to form rugged polycrystalline silicon surfaces

1995-07-07

1996-12-10

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 47, 437 60, 437919, 148DIG14, H01L 21265

Patent

active

055830706

ABSTRACT:
A process for fabricating stacked capacitor, DRAM, devices, has been developed in which the surface area of the storage node has been significantly increased as a result of a unique set of deposition and annealing conditions. An amorphous polysilicon layer, used as the upper layer of the storage node, is ramped up in pure nitrogen, and then insitu annealed, to result in a polycrystalline structure, exhibiting significant surface area increases, due to the formation of surface concave and convex protrusions. The increase in storage node surface area allows for increased DRAM capacitance, without the use of larger dimension stacked capacitors, or thinner dielectrics.

REFERENCES:
patent: 5082797 (1992-01-01), Chan et al.
patent: 5266514 (1993-11-01), Tuan et al.
patent: 5278091 (1994-01-01), Fazan et al.
patent: 5290729 (1994-03-01), Hayashide et al.
patent: 5318920 (1994-06-01), Hayashide
patent: 5387531 (1995-02-01), Rha et al.
patent: 5418180 (1995-05-01), Brown

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