Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Patent
1997-12-19
2000-03-14
Gorgos, Kathryn
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
205157, 205183, 205187, 427 96, 427 97, C25D 502, H05K 300
Patent
active
060368365
ABSTRACT:
A process to create metallic stand-offs or studs on a printed circuit board (PCB). The process allows to obtain studs constituted by three successive layers of metal (Cu1, Cu2 and Cu3 or Ni) of which at least the two first layers are made of copper. The height of the so-created stand-off is sufficient to use it in the flip chip technology to assemble chips to a printed circuit board. The present process is implemented according either to the electro-plating (galvano-plating) or to the electrochemical-plating technique.
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Ackaert Ann Marie
Allaert Koenraad Juliaan Georges
De Baets Johan
Peeters Joris Antonia Franciscus
Van Calster Andre Michel
Gorgos Kathryn
Nicolas Wesley A.
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