Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
2000-04-05
2001-10-16
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C327S112000
Reexamination Certificate
active
06304121
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor devices and in particular to a method and apparatus to monitor and compensate for variation in device behavior.
BACKGROUND OF THE INVENTION
Modern semiconductor processing achieves millions of semiconductor devices on a single square inch of wafer. During semiconductor processing it is desirable to maintain the processing parameters generally constant to achieve a uniform process over the entire wafer. However, due to the inherent behavior of processing methods, the devices on the wafers vary in doping, size, and structure from one process run to the next. This variation is particular pronounced in short channel devices because a uniform deviation from nominal is a more significant percentage of a small device's overall channel dimension.
The variance may cause the operation of devices created during different semiconductor processing runs to differ slightly. This slight difference in behavior affects device characteristics such as current output for a particular input voltage. In terms of circuit behavior, this type of variation could have an effect on the slew rate of a circuit. For the purposes of understanding the slew rate is the rate of change at which the output of a device reacts to a change at its input.
Prior art systems operated at generally low speeds, which is to say, data was exchanged between systems at data transfer rates below those of the present invention. Low speed operation does not test the capabilities of the device and the variance in device behavior was not problematic.
In contrast to operation at generally slow speeds, operation at high speeds, i.e., a high rate of change in the signal at the input of a device, is problematic for devices that vary over process, i.e., vary in behavior from one process run to the next. For purposes of understanding, device behavior may be grouped into three categories: Fast, Normal, and Slow. In a digital environment fast devices have a larger current (Id) as compared to a slow device, which has a lower current (Id) for a particular V
ds
and V
gs
as compared to nominal. Of course, the output current of a device may assume any value between fast and slow since semiconductor processing parameters vary gradually from process to process.
Differences in device current output disrupt operation of circuits. To achieve proper operation of a semiconductor circuit at high speed, each device should have a generally uniform manner of operation. For example, in a digital environment, if a first device provides a larger current output than a second device to a generally similar input signal, then a non-uniform manner of operation can occur.
By way of example, in a digital circuit having numerous parallel output ports, it is desirable for the circuitry controlling each output port to operate at a known slew rate. Stated again, the slew rate for the purposes of understanding is the rate of change at which the output of a device reacts to a signal change at its input. If the slew rate of one or more of the output ports does not meet specifications, the circuit may not operate properly. In particular and by way of example, the PCI standard requires a particular slew rate to operate. Because the slew rate of the output circuitry is influenced by the biasing and uniformity in output of current sources that control the output driver circuitry, it is desirable to have a uniform and predictable input to the driver circuitry and for devices connected thereto to operate in a uniform manner.
Factors other than process variation result in changes in semiconductor device behavior. As a result, there is a need in the art for a method and apparatus to compensate for the effects of process parameter variation.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus to dynamically monitor device behavior and compensate in real time to changes in device voltage or current output. The present invention also provides adaption for device behavior differences resulting from process changes between device manufacturing processes by providing means to monitor the output of devices and dynamically compensate for the variation.
For purposes of understanding, the method and apparatus of the present invention may be thought of as a detection subsystem and a switching subsystem. In one embodiment the detection subsystem communicates with the switching subsystem to effectuate mutual operation. The detection subsystem receives a signal subject to variation as a result of variation of one or more devices in a circuit. In one configuration, the signal being monitored is a signal for which minimal variation is desired. Based on the magnitude of the signal, the detection subsystem enables one or more other semiconductor devices to provide one or more signals to the switching system. It is contemplated that the output of the detection subsystem may comprise a variable output having magnitude dependant on variation. It is further contemplated that the output of the detection subsystem may comprise a plurality of conductors, the number of conductors carrying a high signal being dependant on variation.
The switching subsystem obtains input from the detection subsystem. In response to the variable input, being indicative of variation, the switching subsystem generates a signal having magnitude related to the signal from the detection subsystem. In one configuration, the output of the switching subsystem serves as or is utilized as a substitute for the input signal provided to the detection subsystem. In another configuration the output of the switching subsystem is combined with the detection subsystem input to compensate, supplement or reduce the signal input to the detection subsystem.
An optional buffer subsystem may reside intermediate the detection subsystem and the switching subsystem. The buffer subsystem comprises one or more components configured to output a logical high signal if, and only if, the buffer receives a signal of adequate voltage or current at its input. In multiconductor configurations, a buffer may be associated with each conductor.
In one exemplary configuration the detection subsystem comprises a plurality of semiconductor devices manufactured under the same process as the device or devices being monitored. Because the devices of the detection subsystem are on the same integrated circuit and manufactured during the same manufacturing process as the device being monitored, these devices exhibit generally identical behavior. As a result, the one or more semiconductor devices of the detection subsystem react in a generally identical manner to variation from temperature change or from process variation during manufacture. In one configuration of a detection subsystem with multiple devices, each device comprises a field effect transistor having gate terminal connected to the input of a monitored or precision required signal. Each of the one or more transistors is configured to conduct, turn-on, or enter saturation at a different signal level. As a result, depending on the magnitude of the input signal, a varying number of transistors are on or in saturation.
In such a configuration, multiple output lines, each connected to different source terminal of a detection subsystem transistor, feed into the buffer. The buffer receives the detection circuit output on the multiple output lines and for lines having sufficient it signal level, above a trigger point, the buffer outputs of high logic level signal. For signal lines having less than the trigger point, the buffer outputs a low or zero logic level signal.
Thereafter, the buffer output feeds into the switching subsystem, which in this configuration comprises a number of transistor devices, each having its gate terminal connected to one of the output lines from the buffer. The switching system transistor devices connect via their source terminal to high logic level signals. The drain terminals of the switching system transistor devices connect to a common node or summing junction to thereby combine the outpu
Entridia Corporation
Miller Chad W.
Tran Toan
Weide and Assoc.
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