Fishing – trapping – and vermin destroying
Patent
1994-06-06
1995-09-12
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 62, 437974, 148DIG12, 148DIG135, H01L 2176
Patent
active
054496381
ABSTRACT:
A method for forming a thin, uniform top silicon layer using bonded-wafer SOI technology is described. A dielectric layer is formed on a first surface of a first silicon substrate. A trench is formed in a first surface of a second silicon substrate. A polishing stopper is formed in the trench. A second dielectric layer with a smooth top surface is formed over the polishing stopper and over the first surface of the second silicon substrate. The smooth top surface of the second dielectric layer of the second silicon substrate is bonded to the dielectric layer of the first silicon substrate. Material is removed from the exposed surface of the second silicon substrate to form the silicon layer with well-controlled thickness, having a top surface co-planar with the polishing stopper.
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Hong Gary
Hsue Chen-Chiu
Lin Lawrence Y.
Wu H. J.
Ackerman Stephen B.
Dang Trung
Hearn Brian E.
Saile George O.
United Microelectronics Corporation
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