Process of multilayer conductor chip packaging

Details Process of multilayer conductor chip packaging Process of multilayer conductor chip packaging

1994-09-07

1996-01-02

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437211, 437214, 437217, 437219, H01L 2160

Patent

active

054808413

ABSTRACT:
A process of providing an external wiring and connecting package for a semiconductor chip wherein the chip is a major contributor to the strength of the package. External contacts and wiring are provided by a multilayer wiring member that may include a mesh ground plane with embedded power bus layer over a conductor layer for expansion mismatch control and impedance control, a protective encapsulation covers the bonds from the wiring conductors to the chip, and external contact connections employ fused metal through the contact members.

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