Process of manufacturing semiconductor devices

Radiation imagery chemistry: process – composition – or product th – Registration or layout process other than color proofing

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430311, 430319, G03F 900

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052622584

ABSTRACT:
A process of manufacturing semiconductor devices includes a step of transferring on a surface of a semiconductor wafer by a step-and-repeat reduction projection system a pair of rotation error check patterns formed as a main scale and a vernier scale. In one form, the transfer also includes a pair of resolution check patterns disposed respectively adjacent to the main scale and the vernier scale. In another form, the process includes a first step of transferring a mask pattern including a main or a vernier alignment scale having an alignment check patterns and a second step of transferring, after the completion of said first step, another mask pattern including another main or vernier alignment scale having an alignment check patterns and this second step includes transferring of rotation error check patterns and resolution check patterns. The process includes a step of observing such patterns which enables to detect any rotation errors, resolution deficiency or alignment errors through microscopic fields of vision.

REFERENCES:
patent: 4388386 (1983-06-01), King et al.
patent: 4610940 (1986-09-01), Araihara
patent: 4642672 (1987-02-01), Kitakata
patent: 4806457 (1989-02-01), Yanagisawa
patent: 5017514 (1991-05-01), Nishimoto
Patent Abstracts of Japan, vol. 11, No. 331, Oct. 29, 1987.
Patent Abstracts of Japan, vol. 13, No. 482, Nov. 2, 1989.
Patent Abstracts of Japan, vol. 15, No. 209, May 28, 1991.

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