Fishing – trapping – and vermin destroying
Patent
1989-10-31
1991-05-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 41, 437985, 437239, 148DIG19, H01L 21473
Patent
active
050195344
ABSTRACT:
A process of forming a self-aligned oxide layer covering conductive structures such as MOS transistor gates above a semiconductive substrate while portions of the substrate such as source/drain regions are exposed involves forming side wall spacers against the gates, applying refractory metal to the exposed surface, heating the refractory metal so that it forms refractory silicide at regions where the refractory metal contacts the substrate, removing the unreacted refractory metal, and oxidizing the exposed refractory silicide with a low temperature wet oxidation which causes faster oxide growth above the highly doped gates than above the lightly doped source/drain regions. Subsequent etching of the differentially grown oxide layer exposes the source/drain regions while leaving protected the gate regions. Since no mask was needed for forming and patterning the gate-covering oxide, no misalignment can occur and thus no space need be allowed in the circuit layout for misalignment. In one embodiment, spacing between adjacent MOS transistor gates is reduced from 2.4 microns to 1.2 microns.
REFERENCES:
patent: 4228212 (1980-10-01), Brown et al.
patent: 4593454 (1986-06-01), Baudrant et al.
patent: 4742025 (1988-05-01), Ohyu et al.
Chow, T. P. et al., IEEE Transaction on Electron Devices, vol. Ed-30, No. 11, Nov. 1983, pp. 1480-1497.
Hwang Yun-Sheng
Tsai Nan-Hsiung
Hearn Brian E.
MOS Electronics
Quach T. N.
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