Process of making dual well CMOS semiconductor structure with al

Details Process of making dual well CMOS semiconductor structure with al Process of making dual well CMOS semiconductor structure with al

1984-10-15

1985-12-17

Hearn, Brian E.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29576B, 29577C, 148 15, 148188, 148DIG43, 148DIG53, 148DIG100, 148DIG157, 357 42, H01L 2122, H01L 21265, H01L 2978

Patent

active

045585083

ABSTRACT:
A process for making a CMOS dual-well semiconductor structure with field isolation doping, wherein only a single lithographic masking step is required for providing self-alignment both of the wells to each other and also of the field isolation doping regions to the wells. The lithographic masking step forms a well mask and defines an oxidation barrier which acts as: an implant mask (absorber) during the ion-implantation of a field dopant of one type; an oxidation barrier over one well during the oxidation of the opposite-type well to form over the one well a sacrificial oxide layer which forms the alignment marks for subsequent formation of the field-doping regions; and a dopant-transmitter during the ion-implantation of an opposite-type field dopant which is simultaneously absorbed by the sacrificial oxide. As a result, there are formed field-doped oxide layers self-aligned to the wells so that, with a subsequent masking step, oxide field isolations are defined over the doped oxide layers. A heat cycle is then used to drive the field dopants into the corresponding field-doping regions.

REFERENCES:
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patent: 4144101 (1979-03-01), Rideout
patent: 4244752 (1981-01-01), Henderson et al.
patent: 4280272 (1981-07-01), Egawa et al.
patent: 4306916 (1981-12-01), Wollesen et al.
patent: 4315781 (1982-02-01), Henderson
patent: 4435896 (1984-03-01), Parrillo et al.

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