Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...
Reexamination Certificate
1999-06-29
2002-03-12
Koehler, Robert R. (Department: 1775)
Stock material or miscellaneous articles
All metal or with adjacent metals
Composite; i.e., plural, adjacent, spatially distinct metal...
C148S516000, C148S527000, C148S532000, C148S559000, C148S621000, C148S648000, C148S650000, C148S651000, C148S653000, C148S684000, C428S675000, C428S926000, C428S925000, C428S610000
Reexamination Certificate
active
06355364
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to processes for preparing copper-Invar-copper (CIC) for use in making chip packaging. More particularly, the invention relates to processes of preparing CIC with heat treating and annealing and the CIC cut created thereby.
2. Related Art
Copper-INVAR-copper (CIC) is a useful material for high performance circuit packaging and chip carrier applications due to its excellent thermal, mechanical and electrical properties. The properties of the CIC determine the end performance of the package. In particular, to perform properly, a high performance chip carrier (HPCC), for example, must exhibit a coefficient of thermal expansion (CTE) approximately midway between silicon (approx. 3.4 PPM/° C.) and conventional epoxy/glass boards (approx. 17-20 PPM/° C). Additionally, the electrical design requires very tight control of electrical resistance. While the properties of the CIC are affected by the original CIC inlay ratio (copper to INVAR ratio), they are also greatly affected by fabrication processes, e.g., rolling to decrease the thickness of the CIC, annealing and heat treating. Unfortunately, prior to the present invention, CIC preparation processes have been unable to concurrently obtain optimum CTE, mechanical and electrical properties.
Fluoropolymer dielectrics (e.g., Rogers 2800® manufactured by Rogers, Inc. of Rogers, Conn.) and CIC have been used together for conventional printed circuit packaging applications. The use of a fluoropolymer dielectric layer requires the laminate to be exposed to extremely high lamination pressure. However, when CIC and fluoropolymer are used together to make HPCCs with very tight registration requirements due to their grid and feature size, high lamination pressure can have a severe negative effect. Since CIC has a much higher tensile modulus than fluoropolymer, the CIC controls the dimensional behavior of the package. Therefore, the CIC must possess the right mechanical strength and stiffness which are largely determined by mechanical and thermal processing history.
In view of the foregoing, there has been a need in the art for CIC processes to control the thermal, electrical and mechanical properties as well as the dimensional stability performance of CIC. Further, there is a need for processes that allow combining of CIC and fluoropolymer dielectric.
SUMMARY OF THE INVENTION
Whenever CIC is heated to high temperatures, a diffusion layer is formed. In accordance with the invention, it has been discovered that the CIC preparation for package manufacturing must be sufficient to fully anneal both the copper and the INVAR while minimizing the interdiffusion of the two metals. Interdiffusion results in an intermetallic layer between each copper layer and the INVAR which can drastically increase the mass resistivity of the CIC and hinder further processing. It has also been discovered that formation of this layer is dependent on both the time and temperature at which the layer is heated.
In a first general aspect in accordance with the present invention is provided a process of preparing a copper-INVAR-copper clad sheet comprising the steps of: providing a section of copper-INVAR-copper clad sheet; and annealing the section at a temperature in a range of 1475° F. to 1625° F. for a time in a range of 40 to 120 seconds.
In a second general aspect in accordance with the invention is provided a process of preparing a copper-INVAR-copper clad sheet comprising the steps of: providing a section of copper-INVAR-copper clad sheet; and heat treating the section at a temperature in a range of 1275° F. to 1425° F. for a time in a range of 40 to 120 seconds.
The annealing and heat treating processes for CIC of the claimed invention enhance the manufacturing yield and end performance of chip packages and provide a CIC clad sheet, possibly with a fluoropolymer dielectric layer, exhibiting optimum properties. In particular, the annealing process allows for fully annealing the copper and the INVAR while minimizing the intermetallic layer. Hence, it provides optimum recrystallization of the INVAR grain structure. It also results in softer INVAR which allows the additional rolling steps necessary for further thickness reductions.
The heat treating process provides for fully annealing the copper and partially annealing and stress relieving the INVAR. The heat treating process produces the best mechanical properties by: reducing the anisotropic structure of the CIC sheet created by rolling resulting in more uniform residual stresses, improving etchability of the CIC section and creating stress uniformity in the finished packages.
Both processes provide the benefit of minimizing the intermetallic layer in the CIC, which aids in prevention of etchback during electrochemical polishing (ECP) and improved resistivity.
In a third general aspect of the invention is provided a larninate comprising a clad copper-INVAR-copper structure and having a mass resistivity in a range of 0.75 to 1.0 ohm.gram/m
2
.
In a fourth general aspect of the invention is provided a clad sheet comprising a layer of INVAR between two layers of copper and having a mass resistivity in a range of 0.55 to 0.85 ohm.gram/m
2
.
The third and fourth aspects provide CIC clad sheets having the tensile and yield strength to resist the physical forces present during the lamination cycle, the proper modulus and CTE to achieve the right composite CTE for the packaging application and low enough resistivity to handle the current distribution power required by the electrical design.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention.
REFERENCES:
patent: 4996115 (1991-02-01), Eerkes et al.
patent: 5064173 (1991-11-01), Ecalle et al.
patent: 5089059 (1992-02-01), Reiniche et al.
patent: 5128008 (1992-07-01), Chen et al.
patent: 5613185 (1997-03-01), Marsden et al.
patent: 6179990 (2001-01-01), Galasco et al.
patent: 85028886 (1985-07-01), None
“Process Considerations in the Fabrication of Teflon Printed Circuits Boards”, by Light et al, 1994 Proceedings, 44 Electronic Components & Technology Conference, May 1994, pp. 542-549.
“High Performance Carrier Technology: Materials and Fabrication”, by Light et al, 1993 International Electronics Packaging Conference, San Diego, California, vol. 1, pp. 440-456; Sep. 12-15, 1993.
“High Performance Carrier Technology”, by Heck et al, 1993 International Electronics Packaging Conference, San Diego, California, vol. 1, pp. 771-779; Sep. 12-15, 1993.
Harvey et al., “Separator Sheets Used To Prevent Interdiffusion of Copper,” IBM Technical Disclosure Bulletin, vol. 35, No. 2, pp.319-320, Jul. 1992.
Grebe et al., Fabrication of High Quality Defect-Free Metal Carriers, IBM Technical Disclosure Bulletin, vol. 36, No. 1, pp. 5-6, Jan. 1993.
Japp Robert M.
Jimarez Lisa J.
McClure Bonnie S.
Fraley Lawrence R.
Koehler Robert R.
Schmeiser Olsen & Watts
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