Process of forming a semiconductor memory cell with continuous p

Metal treatment – Compositions – Heat treating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

29571, 29577C, 29578, 29580, 148174, 148187, 148188, 156653, 156657, 156662, 357 23, 357 45, 357 51, 357 59, 357 91, 427 85, 427 86, 427 96, 427101, H01L 2126, H01L 21283, H01L 2978

Patent

active

042149177

ABSTRACT:
A process is described for forming a plurality of polysilicon runs on the surface of a semiconductor substrate, such as a silicon substrate, at least one of the polysilicon runs having a resistor portion formed therein, and at least one of the polysilicon runs forming the conductive gate electrode of a self-aligned insulated silicon gate field effect device. A specific embodiment of the process involves forming protective oxide layer on the substrate with depressions or wells therein to define active area regions of field effect devices, depositing a layer of polysilicon to overly the protective oxide layers, implanting dopant ions in the polysilicon layer to establish an initial conductivity of the polysilicon corresponding to resistor material, patterning the polysilicon layer to define desired polysilicon runs, with at least one of the polysilicon runs traversing across the gate region and gate oxide of a field effect device to serve as the gate electrode thereof; establishing an oxide layer over the surface and then removing oxide to both expose the active areas of the field effect devices where not protected by the polysilicon gate electrodes and also to define a remaining resistor mask of the oxide which overlies and protects the resistor portions of the polysilicon runs; and applying dopant to render the unprotected portions of the polysilicon runs highly conductive relative to the oxide masked resistor portions thereof and to simultaneously dope the exposed active areas of field effect devices.

REFERENCES:
patent: 3570114 (1971-03-01), Bean et al.
patent: 3576478 (1971-04-01), Watkins et al.
patent: 3825442 (1974-07-01), Moore
patent: 3864817 (1975-02-01), Lapham et al.
patent: 3891190 (1975-06-01), Vadasz
patent: 4055444 (1977-10-01), Rao
patent: 4092735 (1978-05-01), McElroy
patent: 4110776 (1978-08-01), Rao et al.
patent: 4133000 (1979-01-01), Greenstein
patent: 4139785 (1979-02-01), McElroy
patent: 4139786 (1979-02-01), Raymond et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process of forming a semiconductor memory cell with continuous p does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process of forming a semiconductor memory cell with continuous p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process of forming a semiconductor memory cell with continuous p will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-903000

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.