Process monitor for CMOS integrated circuits

Details Process monitor for CMOS integrated circuits Process monitor for CMOS integrated circuits

1995-07-25

1997-05-20

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Compensation for variations in external physical values

327 35, 327 38, 327175, H03K 1714, H03K 908

Patent

active

056315961

ABSTRACT:
A process for evaluating acceptability of a digital circuit having a first type of circuit element for a first change of state and a second type of circuit element for a second change of state, the process comprising: generating a leading edge of a first pulse with a pulse generation circuit formed on a substrate in common with the digital circuit and having elements of the first and the second type; generating a trailing edge of a first pulse with a pulse generation circuit formed on a substrate in common with the digital circuit and having elements of the first and the second type; generating an accepted-rejected signal, functionally related to the width of the pulse.

REFERENCES:
patent: 5068547 (1991-11-01), Gascoyne

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