Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1993-07-13
1994-01-11
Callahan, Timothy P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307269, 328 58, H03K 3017, H03K 504
Patent
active
052784568
ABSTRACT:
A process independent digital clock shaping network is described for generating an internal clock signal having preset high state (T.sub.on) and low state (T.sub.off) intervals per cycle from a received clock signal having a substantially constant period but variable T.sub.on and T.sub.off intervals per cycle. The shaping network utilizes a set/reset latch to output the desired clock signal. The set input to the latch receives a set pulse generated at the beginning of each cycle of the received clock signal and the reset input to the latch receives a reset pulse generated by control logic circuitry. The logic circuitry uses the frequency of the received clock signal to generate a reset pulse at the appropriate time for gating of the latch to produce an output clock signal having the desired T.sub.on and T.sub.off intervals per cycle.
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James Miller, Ben Roberts, Paul Madland "High Performance Circuits for the i486 Processor," Proc. Custom Integrated Circuit Conference, Oct. 2-4, 1989, pp. 188-192.
Bechade Roland A.
Kauffmann Bruce A.
Callahan Timothy P.
International Business Machines - Corporation
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