Process for through-hole plating of two-layer printed circuit bo

Details Process for through-hole plating of two-layer printed circuit bo Process for through-hole plating of two-layer printed circuit bo

1995-09-20

1996-11-19

Phasge, Arun S.

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

205159, 205162, 205163, 205164, 205165, 205166, C25D 502, C25D 554, C25D 556

Patent

active

055758983

ABSTRACT:
Process for through-hole plating of printed circuit boards and multilayers by applying a conductive layer of a polythiophene onto the walls of the through-holes and electrodeposition of copper onto the walls of the through-holes, characterized in that a microemulsion of a monomeric thiophene of the formula (I) is used to form the conductive polythiophene layer, ##STR1## in which X denotes oxygen or a single bond,

REFERENCES:
patent: 5194313 (1993-03-01), Hupe et al.
patent: 5403467 (1995-04-01), Jonas et al.
Orbit Abstract of EP 0 553 671 (Aug. 4, 1993).
Orbit Abstract of EP 0 339 341 (Nov. 2, 1989).
Orbit Abstract of DE 39 27 440 (Feb. 28, 1991).

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