Process for the stabilization of PN junctions

Details Process for the stabilization of PN junctions Process for the stabilization of PN junctions

1987-08-10

1989-02-28

Ozaki, George T.

Fishing, trapping, and vermin destroying

437228, 437947, 156653, H01L 21425

Patent

active

048085421

ABSTRACT:
In a process for the stabilization of a PN junction an oxide layer (12) is produced on a semiconductor substrate (11), and above this layer a nitride layer (13) is also produced. The oxide layer (12) is wet-chemically etched following the formation and etching of the nitride layer (13). Following the wet chemical etching of the oxide layer (12), the overlapping nitride (13) is re-etched. Dopant implantation takes place in the wet-chemically-etched region. This then is followed by a diffusion. A process of this type achieves high electrical stability for an electronic component. Thereupon, the photoresist (14) or any other type of layer covering the nitride (13) is removed.

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patent: 4084987 (1978-04-01), Godber
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patent: 4382827 (1983-05-01), Romano-Moran et al.
patent: 4412378 (1983-11-01), Shinada
patent: 4442592 (1984-04-01), Kemmer
patent: 4635090 (1987-01-01), Tamaki et al.
IBM Technical Disclosure Bulletin, vol. 24, No. 9, Feb. 1982, pp. 4728 and 4729, Dalal et al.

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