Process for the production of a single transistor memory cell

Metal working – Method of mechanical manufacture – Assembling or joining

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148 15, 148187, 357 23, 357 55, H01L 2122

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active

041942833

ABSTRACT:
In the production of V-MOS single transistor memory cells a simplification of the previous technology is disclosed wherein a process is utilized without epitaxial processes and with a minimum of doping processes. First the source and the drain zone of a field effect transistor forming a memory cell are produced and only then is a V-shaped recess formed at the site of these zones. In one embodiment, one re-doped zone is constructed as a flat zone and is produced on both sides adjacent to a second re-doped zone extending deeper into the silicon crystal. The V-shaped recess is then etched in such a way that the two zones are completely separated by the V-shaped recess. The silicon surface in the V-shaped recess is provided with a thin SiO.sub.2 layer and with a gate electrode covering it. Advantageously the gate electrodes of neighboring V-MOS cells are united into a line. This occurs with one of the two zones of the transistor, whereas the other zone remains separate.

REFERENCES:
patent: 4003036 (1977-01-01), Jenne
patent: 4065783 (1977-12-01), Ouyang
patent: 4084175 (1978-04-01), Ouyang
patent: 4109270 (1978-08-01), von Basse et al.
patent: 4116720 (1978-09-01), Vinson
Altman, L., "Advances in Designs and New Processes Yield Surprising Performance," Electronics, Apr. 1, 1976, pp. 73-81.

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