Process for the production of a multi-chip wiring arrangement

Details Process for the production of a multi-chip wiring arrangement Process for the production of a multi-chip wiring arrangement

1975-09-02

1977-09-13

DiPalma, Victor A.

Metal working

Method of mechanical manufacture

Electrical device making

29628, 174 685, 427 96, 427 97, H05K 306, H05K 310

Patent

active

040472906

ABSTRACT:
A process for producing multi-chip wiring arrangements which consist of a ceramic carrier with through contact holes associated with thin film wiring on one side of the carrier and with multi layer, thick layer wiring on the other side of the carrier. The holes on the one side of the carrier are metallized and galvanically strengthened while the holes on the other side of the carrier are sealed by baking therein a thick layer of paste. Thereafter the multi layer, thick layer wiring and the thin film wiring are produced in that order.

REFERENCES:
patent: 3619725 (1971-11-01), Soden et al.
patent: 3672986 (1972-06-01), Schneble et al.
patent: 3756891 (1973-09-01), Ryan
patent: 3773554 (1973-11-01), Scrutton et al.
patent: 3808046 (1974-04-01), Davey
patent: 3808049 (1974-04-01), Caley et al.
patent: 3808681 (1974-05-01), Law et al.
patent: 3934336 (1976-01-01), Morse
"Solid State Technology," Multilayer Substrates Utilizing Thin Film and Thick Film Technologies, May 1971, pp. 38-42.

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