Process for the preparation of a thin film transistor

Details Process for the preparation of a thin film transistor Process for the preparation of a thin film transistor

1994-07-25

1995-11-28

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 29, 437 84, H01L 2186

Patent

active

054707692

ABSTRACT:
A process for the preparation of a thin film transistor is provided which includes sequentially depositing a gate insulating layer, an amorphous silicon layer, and an n+ amorphous silicon layer. The n+ amorphous silicon layer is disposed between source and drain electrodes and is oxidized by a plasma oxidation process so that switching properties, interface properties between the amorphous silicon layer and the n+ amorphous silicon layer and a production yield are enhanced, while the preparation steps of forming an etch stopper and removing the n+ amorphous silicon layer disposed between the source electrode and the drain electrode are reduced.

REFERENCES:
patent: 4433004 (1984-02-01), Yonezawa et al.
patent: 4646424 (1987-03-01), Parks et al.
patent: 4933296 (1990-06-01), Parks et al.
patent: 5053354 (1991-10-01), Tanaka et al.
patent: 5326712 (1994-07-01), Bae

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