Process for the manufacture of printed circuit boards

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

Reexamination Certificate

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Details

C427S098300, C427S259000, C427S272000, C427S282000, C216S017000, C216S105000

Reexamination Certificate

active

06403146

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a process for the manufacture of double-sided and multi-layer printed circuit boards. The method proposed contemplates a specific manufacturing sequence and the use of electroless nickel for providing the necessary interconnections for building the circuitry to the desired thickness and as an etch resist. The method is particularly versatile in reducing the number of steps and variety of chemicals currently necessary to produce these circuit boards.
BACKGROUND OF THE INVENTION
In the manufacture of printed circuit boards, it is now commonplace to produce printed circuitry on both sides of a planar rigid or flexible insulating substrate. Of increased importance is the manufacture of multi-layer printed circuits which consist of parallel, planar, alternating inner layers of insulating substrate material and conductive metal. The exposed outer sides of the laminated structure are provided with circuit patterns, as with double-sided boards, and the inner layers themselves may contain circuit patterns.
In double-sided and multi-layer printed circuit boards, it is necessary to provide conductive interconnection between and among the various layers and/or sides. This is commonly achieved by providing copper plated through-holes. Copper is provided in various ways such as by electroless or electrolytic deposition or combinations thereof.
In terms of providing the desired circuit pattern on the board, the art has developed a variety of manufacturing sequences, many of which fall into the broad categories of subtractive or additive techniques. Common to the subtractive processes is the need to etch away (or subtract) metal to expose the desired circuit patterns. Additive processes, on the other hand, begin with clean dielectric substrate surfaces and build up thereon metallization in desired areas only, the desired areas being those not masked by a previously applied pattern of plating resist material. While avoiding the problems associated with the etching required in subtractive processes, additive processes have their own inherent difficulties in terms of the choice of resist materials, the ability to build up the full metallization thickness desired by electroless methods, the relatively long time periods required to electrolessly build the desired thickness'and weaknesses in the physical properties of most electroless copper, deposits.
U.S. Pat. No. 4,897,118 (Ferrier et. al), whose teachings are incorporated herein by reference, reveals a process for selective metallization a substrate in a predetermined desired pattern (i.e. additive technology). Ferrier et. al. discussed additive technology, proposed certain improvements thereto, and give a fair picture of the current state-of-the-art in this area. The current invention proposes improvements thereto which provide significant advantages in reducing the number of steps and chemicals involved in the fabrication thereby making the fabrication process more economical and feasible.
The prior art additive processes suffered from a variety of problems. Firstly, most plating masks currently used in the industry are strippable in alkaline solutions. Electroless copper baths are invariably alkaline, usually very alkaline, with pH's in excess of 12. Therefore, known plating resists have great difficulty in maintaining their integrity and adhesion to the board surface when subjecting to plating in electroless copper baths, particularly when the long plating periods required by these techniques (8 to 24) hours are taken into consideration. When the plating mask loses its integrity and/or adhesion to the surface, circuit definition fails. Thus the current invention's proposal of the use of a permanent solder mask as both a solder mask and a plating resist overcomes these problems. For a discussion of soldermasks, their composition and uses, see U.S. Pat. No. 5,296,334, the teachings of which are incorporated herein by reference in their entirety. The permanent nature of the solder mask makes it much more resistant to subsequent processing solutions. The application of solder mask prior to the formation of holes in the printed circuit board has not, heretofore, been attempted. As can be seen from this invention disclosure, several benefits flow from this early application of solder mask. Secondly, the plating rates of electroless copper baths are relatively slow, usually averaging about 60 to 80 microinches per hour. In comparison, electroless nickel plating rates are about 5 times faster, averaging about 350 microinches per hour. Thus, the production rate utilizing electroless nickel can be approximately 5 times that of electroless copper.
SUMMARY OF THE INVENTION
The present invention proposes an improved process for the manufacture of printed circuit boards. The method provides various advantages over the prior art, including reduced number of cycle steps, reduced number and types of necessary chemical treatments and increased manufacturing efficiency. This method thus overcomes many difficulties experienced with prior methods.
The method currently proposed contemplates a specific manufacturing sequence for the production of printed circuit boards in combination with electroless plating for building circuitry to thickness. The most preferred form of electroless plating in this application is electroless nickel. The following basic production cycle is proposed for implementation of this invention:
1. Form circuitry (either double sided or multi layer package)
2. Apply a solder mask
3. Apply a de-sensitizing mask
4. Drill or punch the desired holes
5. Activate holes
6. Strip away the desensitizing mask
7. Initiate plating (electroless copper or electroless nickel-boron)
8. Electroless Plate to desired thickness (additive electroless copper or electroless nickel-phosphorous)
9. Final finish
Various optional steps may be added to this basic cycle to suit the particular needs of the fabricator. As used herein, and in the claims, copper clad laminate shall include multilayer circuitry packages as well as double sided circuitry packages.
DETAILED DESCRIPTION OF THE INVENTION
The present method is an improvement upon the additive techniques for the production of printed circuits. The present invention proposes a type of semi-additive technique. The invention addresses many, if not all, of the concerns and problems experienced by past techniques through the use of a specific processing sequence. The processing sequence allows the application of a permanent coating, the solder mask, very early in the stages of printed circuit production as opposed to at the end of the processing. This early application of the solder mask provides several advantages. Firstly, the solder mask acts as a resist in the electroless plating. Because the solder mask is a permanent casting, it easily maintains adhesion and resists the various processing solutions, whereas the prior art temporary resists frequently lost adhesion in these types of processing sequences. Secondly, the solder mask acts both as a solder mask and a plating resist, thus providing efficiency.
The present invention proposes the following basic cycle for the production of double-sided and multilayer printed circuit boards:
1. Form circuitry (either double sided or multilayer package)
2. Apply a solder mask
3. Apply a desensitizing mask
4. Drill or punch the desired holes
5. Activate holes
6. Strip away the desensitizing mask
7. Initiate plating
8. Plate to thickness
9. Optionally, final finish
The first step calls for the formation of circuitry. In the case of a double sided board, this step would begin with copper clad laminate material followed by the following print and etch sequence. The copper clad laminate material is then imaged on both sides with an etch resist such that the desired circuitry is covered by the etch resist and the remainder of the copper is exposed. The material is then subjected to an etchant such that the exposed copper is etched away allowing the resist covered copper circuitry to stand out in vertical reli

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