Process for the manufacture of doped semiconductor single...

Details Process for the manufacture of doped semiconductor single... Process for the manufacture of doped semiconductor single...

2006-06-30

2008-08-12

Hiteshew, Felisa C (Department: 1792)

Single-crystal, oriented-crystal, and epitaxy growth processes;

Processes of growth from liquid or supercritical state

Havin growth from molten state

C117S082000, C117S083000

Reexamination Certificate

active

07410540

ABSTRACT:
In a process for manufacturing doped semiconductor single crystal comprises solidifying in a crucible, the amount of dopant is added into the semiconductor melt after the beginning of the crystal growth onto the seed crystal, or after at least partial solidification of the semiconductor single crystal in a conical or tapered portion of the crucible. Dopant may be partially added in advance into the crucible, with the remainder added into the semiconductor melt as described. Type III-V semiconductor single crystals or wafers having a diameter of at least about 100 mm, can be prepared having an electrical conductivity of at least about 250 Siemens/cm, and/or an electric resistivity of at most about 4×10−3Ωcm, and/or a significantly improved ratio of hall mobility to charge carrier concentration.

REFERENCES:
patent: 3496118 (1970-02-01), Willardson et al.
patent: 4911780 (1990-03-01), Morioka et al.
patent: 5471938 (1995-12-01), Uchida et al.
patent: 2004/0187768 (2004-09-01), Itani et al.
patent: 10 2004 015 863 (2005-04-01), None
patent: 10-279398 (1998-10-01), None
patent: 2000-109400 (2000-04-01), None
patent: 2004-115339 (2004-04-01), None
patent: 2004-217508 (2004-08-01), None
patent: WO 2005/007939 (2005-01-01), None
Korean Patent Abstract, KR 101992010134 B1, Goldstar Cable Co., Nov. 16, 1992.
R. Fornari et al., “Dislocation-Free Silicon-Doped Gallium Arsenide Grown By LEC Procedure,” Journal of Crystal Growth, vol. 63, 1983, pp. 415-418.
I.C. Bassignana et al., “Variation in the lattice parameter and crystal quality of commercially available Si-doped GaAs substrates,” Journal of Crystal Growth, vol. 178, 1997, pp. 445-458.
J.B. Mullin et al., “A Study on the Relationship Between Growth Technique and Dopants on the Electrical Properties of GaAs with Special Reference to LEC Growth,” Journal of Crystal Growth, vol. 50, 1980, pp. 625-637.
T. Bünger et al., “Development of a vertical gradient freeze process for low EPD GaAs substrates,” Materials Science Engineering, vol. B80, 2001, pp. 5-9.
ASTM International Designation: F 76-86, “Standard Test Methods for Measuring Resistivity and Hall Coefficient and Determining Hall Mobility in Single-Crystal Semiconductors,” 2002, pp. 1-13.

Affiliated with

Also associated with

Rating

Process for the manufacture of doped semiconductor single... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for the manufacture of doped semiconductor single..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for the manufacture of doped semiconductor single... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4009352