Process for the formation of a monolithic high voltage semicondu

Fishing – trapping – and vermin destroying

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437 54, 437 31, 437 30, 437154, H01L 2120

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047804300

ABSTRACT:
The invention concerns a process for formation of a high voltage monolithic semiconductor device that contains at least one power transistor and an integrated control circuit integrated in a single chip. The device is formed by means of a triple epitaxy which utilizes the same doping agent and by growth of the third epitaxial layer with a concentration of impurities greater than the previous ones. By spreading the buried layers till they penetrate inside the third epitaxial layer, collector regions of transistors in the integrated control circuit are obtained free of unwanted intermediate layers or phantom layers caused by the outdiffusion of doping substance present in the heavily doped isolation region with conductivity of the opposite type. Finally PN junctions are formed for the collector region of a power transistor and for the isolation zone of the integrated control circuit, capable of withstanding high voltages.

REFERENCES:
patent: 4458158 (1984-07-01), Mayrand
patent: 4641171 (1987-02-01), Bertotti et al.
patent: 4667393 (1987-05-01), Ferla et al.
patent: 4721684 (1988-01-01), Musumeci

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