Process for the electrical testing of the base material for...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S551000, C324S548000

Reexamination Certificate

active

06285196

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the use of a so-called base material in the manufacture of printed circuit boards for electronic or electric circuits.
BACKGROUND OF THE INVENTION
As the diagram in
FIG. 2
shows, this base material consists of two relatively thin copper layers (about 17.5 to 34 micrometers thick),
1
and
2
, separated from one another by a layer of fibre-glass resin web,
3
, (about 50 to 100 micrometers thick). A layer
0
of base material of this type is the basic material for the manufacture of multi-layer circuit boards. The state of the art for the manufacture of base material and multi-layer circuit boards is described in the book “Handbook of circuit board technology” by Günther Hermann, published by Eugen G. Leuze, D-7968 SAULGAU. (References to this publication in what follows will be indicated by “(Handbook, page xx)” in brackets).
In multi-layer circuit boards (or PCB—printed circuit boards) with up to 20 copper layers, several layers,
4
,
5
,
6
, of the base material are placed on top of each other—as shown in the diagram at FIG.
3
—after each base material layer has been processed. (Handbook, page 217).
By the processing of a base material layer is meant the creation of printed conductor paths by exposure and etching processes applied to the copper layers. Generally a copper layer with various circuit sections is used as the signal level and the others as reference potential levels.
The base material layers
4
,
5
and
6
are separated from one another by intermediate insulating layers ⅘ and ⅚, generally made of a fibre-glass epoxy resin compound. These intermediate insulating layers are preferably only 100 micrometers thick. When multi-layer circuit boards are manufactured, the base material layers are pressed together with the intermediate insulating layers under pressure, in a vacuum and at high temperature. That prevents the inclusion of any unwanted air and the epoxy resin in the intermediate insulating layers becomes hard.
When all the layers of base material in the multi-layer circuit boards have been pressed, blind holes and through holes are drilled and metallised at pre-determined places, through which particular points on different copper layers are electrically connected (Handbook, page 423).
Before the manufacture of multi-layer circuit boards, according to the state of the art (in a recommendation by the IPC “Institute of Printed Circuits”, USA), certain processed base material layers are subjected to a test of their dielectric strength by applying e.g. 500 V direct current. This results in a relatively high rate of rejection, especially in the case of very thin layers of fibre-glass resin web.
Circuit boards with high specifications, e.g. for fast computers, must have particularly thin fibreglass resin layers, because it is in this way that the required higher capacity is achieved.
The processed base material which is rejected in the high voltage test according to the state of the art is the result of
1. flaws in the fibre-glass resin web of the base material or
2. conductive impurities (e.g. conductive metal particles in the surrounding area) on or in this layer.
According to the state of the art the rejected material is only identified when the base material layer has already been processed (Handbook, pages 221/222), i.e. after the processes-expensive in terms of both time and money-to manufacture the printed circuit from the corresponding copper layers have already been completed.
Base material which has been processed and is then rejected in the high-voltage test represents not only a waste of materials but also unnecessary processing.
According to the state of the art there is no preliminary electrical testing of unprocessed base material.
SUMMARY OF THE INVENTION
To overcome the above-indicated disadvantage, it is the aim of the invention to develop a process for the preliminary testing of base material layers which would allow these layers to be tested for their electrical usability before they are processed.
This aim of the invention will be achieved by the characteristics described in claim
1
.
Advantageous further developments of the process according to the invention are described in the sub-claims.


REFERENCES:
patent: 4504782 (1985-03-01), Zbinden
patent: 4567428 (1986-01-01), Zbinden
patent: 4648298 (1987-03-01), Sutton
patent: 4725314 (1988-02-01), Gulla et al.
patent: 5097214 (1992-03-01), Schinharl
patent: 5441474 (1995-08-01), Morofuji
patent: 5594349 (1997-01-01), Kimura
patent: 5793212 (1998-08-01), Om

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