Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2005-12-08
2010-06-15
Monbleau, Davienne (Department: 2893)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
C438S458000, C257SE21122
Reexamination Certificate
active
07737000
ABSTRACT:
The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.
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Aspar Bernard
Rommeveaux Philippe
E2V Semiconductors
Lowe Hauptman & Ham & Berner, LLP
Monbleau Davienne
Mulcare Shweta
Tracit Technologies
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