Process for testing an integrated circuit package using an integ

Details Process for testing an integrated circuit package using an integ Process for testing an integrated circuit package using an integ

1996-04-30

1998-06-16

Graybill, David

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438 18, 438117, H01L 2152, H01L 2158, H01L 21603, H01L 2166

Patent

active

057669783

ABSTRACT:
A method for testing leads of an integrated circuit package. The method includes a testing substrate with a plurality of conductive portions for use in connection with a test probe. The method further includes at least one compressible conductive bridge member for providing electrical contact between the leads of the integrated circuit package and the conductive portions of the testing substrate. The conductive bridge member has multiple electrically conductive wires embedded therein or secured thereto, each of the wires being parallel to one another and spaced apart from one another. The method uses a frame for retaining the conductive bridge members therein and maintaining the conductive bridge members in electrical contact with the leads of the integrated circuit package and the conductive portions of the testing substrate. The method for attaching the test probe to the circuit package includes the steps of affixing a retainer to the top side of the package and hooking a probe up to the package via the retainer.

REFERENCES:
patent: 3678385 (1972-07-01), Bruner
patent: 4411719 (1983-10-01), Lindberg
patent: 5049813 (1991-09-01), Van Loan et al.
patent: 5137836 (1992-08-01), Lam
patent: 5159266 (1992-10-01), Appold
patent: 5396032 (1995-03-01), Bonham, Jr. et al.

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