Process for T.D.M. frame synchronization employing variable sync

Multiplex communications – Wide area network – Packet switching

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370106, H04J 306

Patent

active

042130115

ABSTRACT:
A process for T.D.M. frame synchronization which employs variable length synchronizing word at the receiving end and wherein the transmitter produces signals which consist of groups each comprising p bits and one marker bit and in respect to each multiplex frame contains a total of m marker bits of which s marker bits form the synchronizing words and where at the transmitter s-1 marker bits determine the following s-th marker bit and wherein the transmitted signal is stored and p+1 addresses are produced which are periodically assigned to the p bits and marker bits of each group and at the receiver the s-th bit is obtained from s-1 bits stored and compared with the corresponding received bit of the T.D.M. signal and when identity occurs pulses having a similar address are counted and a frame synchronizing signal is emitted.

REFERENCES:
patent: 3873920 (1975-03-01), Apple et al.
patent: 3963869 (1976-06-01), Caldwell
patent: 4012589 (1977-03-01), Reisinger
patent: 4124778 (1978-11-01), Amass

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