Process for simultaneously fabricating isolation structures for

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H01L 2712

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050652176

ABSTRACT:
An isolation structure for bipolar and CMOS circuits formed during the same processing steps to optimize the integration of bipolar and CMOS circuits. A deep trench (46) is formed in a semiconductor circuit for providing deep isolation for bipolar circuits. A shallow recess (56) is then formed simultaneous with a stepped sidewall structure of the deep trench. The recess (56) and the trench (46) are covered by an insulating oxide (60). and thereafter filled with an undoped polysilicon (62) to form the different isolating structures for the different types of circuits.

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patent: 4547793 (1985-10-01), Bergeron
patent: 4666556 (1987-05-01), Fulton et al.
Healy; "Integrated Semiconductor Device"; IBM Technical Disclosure Bulletin, vol. 8, No. 7; 12/1965; pp. 1016-1017.
Abbas; "Recessed Oxide Isolation Process"; IBM Technical Disclosure Bulletin, vol. 20, No. 1; 06/1977; pp. 144-145.
Abbas; "Silicon on Polysilicon with Deep Dielectric Isolation"; IBM Technical Disclosure Bulletin,vol. 22, No. 7; 12/1979; pp. 2754-2755.
"Sputtered Silcion Process for Trench Isolation"; IBM Technical Disclosure Bulletin, vol. 27, No. 10A; 03/1985; pp. 5497-5498.
"Trench-Isolation Structure", IBM Technical Disclosure Bulletin, vol. 27, No. 12; 05/1985; pp. 6981-6982.
"Methods - - - Polysilicon Trench Fill in Semiconductor Devices"; IBM Technical Disclosure Bulletin, vol. 30, No. 10; 03.1988; pp. 156-158. 6

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