Process for self-aligned twin wells without N-well and P-well he

Details Process for self-aligned twin wells without N-well and P-well he Process for self-aligned twin wells without N-well and P-well he

1996-04-29

1997-09-23

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437147, 437228PL, H01L 218238

Patent

active

056703953

ABSTRACT:
A method for forming self-aligned twin wells without height difference using only one masking step is described. A layer of silicon oxide is grown over the surface of a semiconductor substrate. A layer of silicon nitride is deposited overlying the silicon oxide layer. A layer of photoresist is coated over the silicon nitride layer. The photoresist layer is exposed to actinic light and developed to form a photoresist mask having an opening to the silicon nitride layer where an N-well is to be formed. The silicon nitride layer which is exposed is etched away to expose the underlying silicon oxide layer. First ions are implanted into the semiconductor substrate through the silicon oxide layer within the opening. A dielectric film is deposited over the substrate. The dielectric film is planarized to the height of the silicon nitride layer. The silicon nitride layer is removed. Second ions are implanted into the semiconductor substrate where it is not covered by the dielectric film. The dielectric film is removed. The first ions are driven in to form the N-well within the semiconductor substrate and the second ions are driven in to form a P-well within the semiconductor substrate completing the formation of the twin wells in the fabrication of the integrated circuit device.

REFERENCES:
patent: 5130271 (1992-07-01), Migita
patent: 5252501 (1993-10-01), Moslehi
patent: 5300797 (1994-04-01), Bryant et al.
patent: 5429958 (1995-07-01), Matlock
patent: 5438005 (1995-08-01), Jang
patent: 5455189 (1995-10-01), Grubisich

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