Process for running programs on processors and corresponding...

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C717S149000, C717S155000, C718S108000, C712S215000

Reexamination Certificate

active

07395532

ABSTRACT:
Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

REFERENCES:
patent: 5031096 (1991-07-01), Jen et al.
patent: 5129077 (1992-07-01), Hillis
patent: 5634135 (1997-05-01), Hollander
patent: 5787302 (1998-07-01), Hampapuram et al.
patent: 5951674 (1999-09-01), Moreno
patent: 6044450 (2000-03-01), Tsushima et al.
patent: 6272481 (2001-08-01), Lawrence et al.
patent: 6298370 (2001-10-01), Tang et al.
patent: 6367067 (2002-04-01), Odani et al.
patent: 6615339 (2003-09-01), Ito et al.
patent: 6651082 (2003-11-01), Kawase et al.
patent: 6792560 (2004-09-01), Francis et al.
patent: 6799266 (2004-09-01), Stotzer et al.
patent: 6892293 (2005-05-01), Sachs et al.
patent: 6950926 (2005-09-01), Menezes
patent: 6988183 (2006-01-01), Wong
patent: 7062634 (2006-06-01), Southwell et al.
patent: 2003/0200421 (2003-10-01), Crook et al.
patent: 2004/0039900 (2004-02-01), Heishi et al.
patent: 2004/0059894 (2004-03-01), Rovati et al.
patent: 0 768 602 (1997-04-01), None
patent: 0 924 603 (1999-06-01), None
patent: 1 102 166 (2001-05-01), None
patent: 1 152 329 (2001-11-01), None
patent: 1 324 191 (2003-02-01), None
patent: 2332075 (1999-09-01), None
patent: WO 00/33186 (2000-06-01), None
patent: WO 01/53933 (2001-07-01), None
Biglari-Abhari, M. et al., “Improving Binary Compatibility in VLIW Machines Through Compiler Assisted Dynamic Rescheduling,” inProceedings of the Euromicro Conference, Euromicro 26, vol. 1, Los Alamitos, CA, Sep. 5-7, 2000, pp. 386-393.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Process for running programs on processors and corresponding... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for running programs on processors and corresponding..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for running programs on processors and corresponding... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2809044

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.