Process for providing isolation between CMOS devices

Details Process for providing isolation between CMOS devices Process for providing isolation between CMOS devices

1988-09-12

1989-07-11

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 34, 437 57, 437 70, H01L 21265, H01L 21316, H01L 2132

Patent

active

048472131

ABSTRACT:
A process is disclosed for the selective oxidation of MOS devices which preferentially removes implanted field doping from selected silicon substrate regions. In one embodiment, a CMOS substrate is provided with an overlying layer of silicon oxide and a layer of polycrystalline silicon. Active and field regions are defined in each of the CMOS device regions. A blanket boron implantation dopes both the N-type and P-type field regions. The N-type field region is selectively oxidized at a greater oxidation rate than is the P-type field region to cause a greater segregation of boron impurities into the growing oxide over the N-type field region. Regions of enhanced boron doping are thus formed under the field oxide in the P-type region, but not in the N-type region.

REFERENCES:
patent: 4407696 (1983-10-01), Han et al.
patent: 4447290 (1984-05-01), Matthews
patent: 4481705 (1984-11-01), Haskell
patent: 4570325 (1986-02-01), Higuchi
patent: 4743563 (1988-05-01), Pfiester et al.

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