Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2005-04-05
2005-04-05
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S406000, C438S422000, C438S455000, C438S456000, C438S459000, C438S960000
Reexamination Certificate
active
06875633
ABSTRACT:
A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.
REFERENCES:
patent: 5371037 (1994-12-01), Yonehara
patent: 5374564 (1994-12-01), Bruel
patent: 5714395 (1998-02-01), Bruel
patent: 5882987 (1999-03-01), Srikrishnan
patent: 5985681 (1999-11-01), Hamajima et al.
patent: 6020252 (2000-02-01), Aspar et al.
patent: 6171982 (2001-01-01), Sato
patent: 6271101 (2001-08-01), Fukunaga
patent: 6294478 (2001-09-01), Sakaguchi et al.
patent: 6331208 (2001-12-01), Nishida et al.
patent: 6342433 (2002-01-01), Ohmi et al.
patent: 6602761 (2003-08-01), Fukunaga
Stanley, Wolf Ph.D. In Silicon Processing for the VLSI Era, vol. 2: Process Integration, Lattica Press, 1990, pp. 238-239.*
A.J. Auberton-Herve et al., Industrial Research Society (Kogyo Chosa Kai); Electronic Material, pp. 83-87, Aug. 1997 (Concise Statement attached).
“A Dissolved Wafer Process Using a Porous Sacrificial Layer and a Lightly-Doped Bulk Silicon Etch-Stop”, Bell et al., Micro Electro Mechanical Systems, 1998, MEMS 98, Proceeding., The Eleventh Annual International Workshop on 1998, pp. 251-256.
Brewster William M.
Costellia Jeffrey L.
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
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