Process for producing semiconductor article

Details Process for producing semiconductor article Process for producing semiconductor article

2000-08-08

2003-03-18

Fahmy, Wael (Department: 2823)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C438S457000, C438S459000

Reexamination Certificate

active

06534382

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates-to a process for producing a semiconductor article that can suitably be used for producing a semiconductor device such as a semiconductor integrated circuit, a solar cell, a semiconductor laser device or a light emitting diode. More particularly, it relates to a process for producing a semiconductor article including a step of separating a substrate.
2. Related Background Art
Semiconductor articles are popular in terms of semiconductor wafers, semiconductor substrates and various semiconductor devices and include those adapted for producing semiconductor devices by utilizing the semiconductor region thereof and those used as preforms for producing semiconductor devices.
Some semiconductor articles of the type under consideration comprise a semiconductor layer arranged on an insulator.
The technology of forming a single crystal silicon semiconductor layer on an insulator is referred to as silicon on insulator (SOI) technology, which is widely known. Various research has been done to exploit the remarkable advantages of SOI that cannot be achieved by using bulk Si substrates that are used for producing ordinary Si integrated circuits. The advantages of the SOI technology include:
1. The ease of dielectric isolation that allows an enhanced degree of integration;
2. The excellent resistivity against radiation;
3. A reduced floating capacitance that allows a high device operation speed;
4. The omission of the well forming step;
5. The effect of latch up prevention; and
6. The possibility of producing fully depleted field effect transistors using the thin film technology. The advantages of the SOI technology are thoroughly discussed in Special Issue: “Single-crystal silicon on non-single-crystal insulators”; edited by G. W. Cullen, Journal of Crystal Growth, volume 63, No. 3, pp. 429-590 (1983).
In recent years, a number of reports have been published on the SOI technology for providing substrates that can realize high speed operation and low power consumption for MOSFETs (IEEE SOI conference 1994). The process of manufacturing a semiconductor device can be significantly enhanced by using the SOI structure when compared with the corresponding process of manufacturing a device on a bulk Si wafer, because of the implementation of a very simplified device isolation step. Thus, the use of the SOI technology can provide a significant cost reduction in manufacturing a semiconductor device, particularly in terms of the wafer cost and the process cost if viewed from the conventional technology of manufacturing a MOSFET or an IC on a bulk Si substrate, to say nothing of the remarkable performance of such a semiconductor device.
Fully depleted MOSFETs are very promising for achieving high speed operation and low power consumption if provided with improved drive power. Generally speaking, the threshold voltage (Vth) of a MOSFET is determined as a function of the impurity concentration of its channel section but, in the case of a fully depleted (FD) MOSFET, the characteristics of the depletion layer are influenced by the SOI film thickness. Therefore, the SOI film thickness has to be rigorously controlled in order to improve the yield of manufacturing LSIs.
Meanwhile, a device formed on a compound semiconductor shows a remarkable level of performance that cannot be expected from silicon, particularly in terms of high speed operation and light emission. Such devices are currently formed by means of epitaxial growth on a compound semiconductor substrate that may be made of GaAs or a similar compound. However, a compound semiconductor substrate is costly and mechanically not very strong so that it is not adapted to produce a large wafer.
Thus, efforts have been made to form a compound substrate by hetero-epitaxial growth on a Si wafer that is inexpensive, mechanically strong and good for producing a large wafer.
Researche on forming SOI substrates became significant in the 1970s. Initially, attention was paid to the technique of producing single crystal silicon by epitaxial growth on a sapphire substrate (SOS: silicon on sapphire), that of producing a SOI structure through full isolation by porous oxidized silicon (FIPOS) and the oxygen ion implantation technique. The FIPOS method comprises steps of forming an island of N-type Si layer on a P-type single crystal Si substrate by proton/ion implantation (Imai et al., J. Crystal Growth, Vol. 63,547 (1983)) or by epitaxial growth and patterning, transforming only the P-type Si substrate into a porous substrate by anodization in a HF solution, shielding the Si islands from the surface, and then subjecting the N-type Si islands to dielectric isolation by accelerated oxidation. This technique is, however, accompanied by a problem that the isolated Si region is defined before the devices are produced and restricts the freedom of device design.
The oxygen ion implantation method is also referred to as the SIMOX method, which was proposed by K. Izumi for the first time. With this technique, oxygen ions are implanted into a Si wafer to a concentration level of 10
17
to 10
18
/cm
2
and then the latter is annealed at high temperature of about 1,320° C. in an argon/oxygen atmosphere. As a result, the implanted oxygen ions are chemically combined with Si atoms to produce a silicon oxide layer that is centered at a depth corresponding to the projection range (Rp) of the implanted ions. Under this condition, an upper portion of the Si oxide layer that is turned into an amorphous state by the oxygen ion implantation is recrystallized to produce a single crystal Si layer. While the surface Si layer used to show a defect rate as high as 10
5
/cm
2
, a recent technological development has made it possible to reduce the defect rate down to about 10
2
/cm
2
by selecting a rate of oxygen implantation of about 4×10
17
/cm
2
. However, the allowable range of energy infusion and that of ion implantation are limited if the film quality of the Si oxide layer and the crystallinity of the surface Si layer are to be held to respective desired level. Hence the film thickness of the surface Si layer and that of the buried Si oxide (BOX; buried oxide) layer are allowed to take only limited values. In other words, a process of sacrificial oxidation or epitaxial growth is indispensable to realize a surface Si layer having a desired film thickness. Such a process by turn gives rise to a problem of uneven film thickness due to the intrinsic adverse effect of the process.
There have been reports saying that SIMOX can produce defective Si oxide regions in the Si oxide layer that are referred to as pipes. One of the possible causes of the phenomenon may be foreign objects such as dust introduced into the layer at the time of ion implantation. The device produced in a pipe region can show degraded characteristics due to the leak current between the active layer and the underlying substrate.
The SIMOX technique involves the use of a large volume of ions that is by far greater than the volume used in the ordinary semiconductor process and hence the ion implantation process may take a long time if a specifically designed apparatus is used for it. Since the ion implantation process is performed typically by raster scanning of an ion beam showing a predetermined flow rate of electric current or by spreading an ion beam, a long time may be required for processing a large wafer. Additionally, when a large wafer is processed at high temperature, the slip problem due to an uneven temperature distribution within the wafer can become very serious. Since the SIMOX process requires the use of extraordinary high temperature that is as high as 1,320° C., which is not observed in the ordinary Si semiconductor process, the problem of uneven temperature distribution will become more serious if a large wafer has to be prepared, unless a highly effective apparatus is not realized.
Beside the above described known techniques of forming SOI, a technique of bonding a single crystal Si substrate to another single crystal Si sub

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