Process for producing CMOS having doped polysilicon gate by outd

Details Process for producing CMOS having doped polysilicon gate by outd Process for producing CMOS having doped polysilicon gate by outd

1986-11-10

1988-11-01

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437200, 437160, 437 45, H01L 21265

Patent

active

047820330

ABSTRACT:
A process for the production of highly integrated circuits contaiining p- and n-channel MOS transistors including gate electrodes which consist of a doped double layer of polysilicon and metal silicide. The gates are doped with boron and are produced by diffusion from the metal silicide layer which has previously been doped with boron by ion implantation into the undoped polysilicon layer. The metal silicide layer preferably consisting of tantalum silicide is provided with a masking layer consisting of SiO.sub.2, and the structuring of the boron-doped silicide gate and the masking layer is carried out after the boron atoms have been diffused in. The process serves to safely avoid undesired boron penetration effects which considerably influence the short channel properties of the transistors. The process is used for the production of CMOS-circuits having a high packing density.

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