Process for producing a field-effect transistor

Details Process for producing a field-effect transistor Process for producing a field-effect transistor

1980-07-08

1983-03-08

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

2976B, 148187, 148188, H01L 2126

Patent

active

043757170

ABSTRACT:
The process of the invention allows, by placing a silicon nitride layer between a first silicon oxide layer developed on a silicon wafer and a second silicon oxide layer developed from polycrystalline silicon grid electrodes, a double self-alignment of the grid electrodes to be obtained which are used as a mask with respect to the channel-forming zones of the transistor and of these same grid electrodes used as a mask with respect to the connections for the source regions of this same transistor, the source regions being obtained by diffusion in the silicon wafer of the dopant of a doped polycrystalline silicon layer forming the connections of the source regions.

REFERENCES:
patent: 3912557 (1975-10-01), Hochberg
patent: 3942241 (1976-03-01), Harigaya et al.
patent: 4181542 (1980-01-01), Yoshida et al.
patent: 4190466 (1980-02-01), Bhattacharyya et al.
patent: 4191602 (1980-03-01), Baliga
patent: 4322882 (1982-04-01), Vora

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