Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth with a subsequent step acting on the...
Reexamination Certificate
2001-05-31
2004-02-10
Kunemund, Robert (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Processes of growth with a subsequent step acting on the...
C117S003000
Reexamination Certificate
active
06689209
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to the preparation of semiconductor grade single crystal silicon which is used in the manufacture of electronic components. More particularly, the present invention relates to a process for preparing single crystal silicon ingots which are substantially free of vacancy-type agglomerated intrinsic point defects, as well as wafers obtained therefrom, wherein said ingots are grown at rates which would otherwise result in the formation of agglomerated vacancy-type intrinsic point defects within the ingots.
Single crystal silicon, which is the starting material for most processes for the fabrication of semiconductor electronic components, is commonly prepared by the so-called Czochralski (“Cz”) method. In this method, polycrystalline silicon (“polysilicon”) is charged to a crucible and melted, a seed crystal is brought into contact with the molten silicon and a single crystal is grown by slow extraction. After formation of a neck is complete, the diameter of the crystal is enlarged by decreasing the pulling rate and/or the melt temperature until the desired or target diameter is reached, thus forming a seed cone. The cylindrical main body of the crystal, which has an approximately constant diameter, is then grown by controlling the pull rate and the melt temperature while compensating for the decreasing melt level. Near the end of the growth process but before the crucible is emptied of molten silicon, the crystal diameter must be reduced gradually to form an end-cone. Typically, the end-cone is formed by increasing the crystal pull rate and heat supplied to the crucible. When the diameter becomes small enough, the crystal is then separated from the melt.
In recent years, it has been recognized that a number of defects in single crystal silicon form in the crystal growth chamber as the crystal cools after solidification. Such defects arise, in part, due to the presence of an excess (i.e. a concentration above the solubility limit) of intrinsic point defects, which are known as vacancies and self-interstitials. Silicon crystals grown from a melt are typically grown with an excess of one or the other type of intrinsic point defect, either crystal lattice vacancies (“V”) or silicon self-interstitials (“I”). It has been suggested that the type and initial concentration of these point defects in the silicon are determined at the time of solidification and, if these concentrations reach a level of critical supersaturation in the system and the mobility of the point defects is sufficiently high, a reaction, or an agglomeration event, will likely occur. Agglomerated intrinsic point defects in silicon can severely impact the yield potential of the material in the production of complex and highly integrated circuits.
Vacancy-type defects are recognized to be the origin of such observable crystal defects as D-defects, Flow Pattern Defects (FPDs), Gate Oxide Integrity (GOI) Defects, Crystal Originated Particle (COP) Defects, crystal originated Light Point Defects (LPDs), as well as certain classes of bulk defects observed by infrared light scattering techniques such as Scanning Infrared Microscopy and Laser Scanning Tomography. Also present in regions of excess vacancies are defects which act as the nuclei for ring oxidation induced stacking faults (OISF). It is speculated that this particular defect is a high temperature nucleated oxygen agglomerate catalyzed by the presence of excess vacancies.
Defects relating to self-interstitials are less well studied. They are generally regarded as being low densities of interstitial-type dislocation loops or networks. Such defects are not responsible for gate oxide integrity failures, an important wafer performance criterion, but they are widely recognized to be the cause of other types of device failures usually associated with current leakage problems.
The density of such vacancy and self-interstitial agglomerated defects in Czochralski silicon historically has been within the range of about 1*10
3
/cm
3
to about 1*10
7
/cm
3
. While these values are relatively low, agglomerated intrinsic point defects are of rapidly increasing importance to device manufacturers and, in fact, are now seen as yield-limiting factors in device fabrication processes.
One approach which has been suggested to control the formation of agglomerated defects is to control the initial concentration of the point defects when the single crystal silicon is formed upon solidification from a molten silicon mass by controlling the pull rate (v) of the single crystal silicon ingot from the molten silicon mass, wherein higher pull rates tend to produce vacancy rich material and lower pull rates tend to produce interstitial rich material, and controlling the axial temperature gradient, G, in the vicinity of the solid-liquid interface of the growing crystal for a given temperature gradient. In particular, it has been suggested that the radial variation of the axial temperature gradient be no greater than 5° C./cm or less. (See, e.g., Iida et al., EP0890662) This approach, however, requires rigorous design and control of the hot zone of a crystal puller.
Another approach which has been suggested to control the formation of agglomerated defects is to control the initial concentration of vacancy or interstitial point defects when the single crystal silicon is formed upon solidification from a molten silicon mass, and then controlling the cooling rate of the crystal from the temperature of solidification to a temperature of about 1,050° C. to permit the diffusion of silicon self-interstial atoms or vacancies and thereby maintain the supersaturation of the vacancy system or the interstitial system at values which are less than those at which agglomeration reactions occur (See, e.g., Falster et al., U.S. Pat. No. 5,919,302 and Falster et al., WO 98/45509). It is generally accepted however that vacancies diffuse as a much slower rate than silicon self-interstitials. Thus, while this approach may be successfully used to prepare single crystal silicon which is substantially free of agglomerated vacancy or interstitial defects, the time required to allow for adequate diffusion of vacancies reduces the benefit of the increased growth velocity, while the decreased growth velocity required to produce interstitial dominated ingots reduces the benefit of the decreased cool down time required to allow diffusion of interstitials. This may have the effect of reducing the throughput for the crystal puller.
SUMMARY OF THE INVENTION
Among the several objects and features of the present invention may be noted the provision of a process for preparing a single crystal silicon ingot, as well as wafers obtained therefrom, having a region which is substantially free of agglomerated defects; the provision of such a process wherein vacancies are initially the predominant intrinsic point defect within the region; the provision of such a process wherein the vacancy concentration in the region is reduced after solidification through recombination with silicon self-interstitials injected from a lateral surface on the constant diameter portion of the ingot; the provision of such a process wherein the injection of interstitials is achieved by thermally inducing a flux of interstitials during ingot growth; the provision of such a process wherein the thermally induced flux of interstitials is achieved after the ingot is separated from the melt; the provision of such a process wherein the vacancy dominated region is converted to a region wherein interstitials predominate; the provision of such a process which does not substantially diminish the throughput of the crystal puller; the provision of such a process which substantially reduces pull rate limitations of the crystal puller in the production of the defect-free silicon ingots; and, the provision of such a process which substantially reduces the average axial temperature gradient G
o
limitations of the crystal puller.
Briefly, therefore, the present invention is directed to a process for growing a sing
Falster Robert J.
Voronkov Vladimir
Anderson Matthew
Kunemund Robert
MEMC Electronic Materials , Inc.
Senniger Powers Leavitt & Roedel
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